文件名称:Reference_Design

  • 所属分类:
  • 其它资源
  • 资源属性:
  • [C/C++] [源码]
  • 上传时间:
  • 2008-10-13
  • 文件大小:
  • 1.64mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • y**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

altera大学计划程序包,包括基本配置,可以直接移植
(系统自动生成,下载前可以参看下载内容)

下载文件列表

压缩包 : 65520799reference_design.rar 列表
Reference_Design\DE2_NIOS\.sopc_builder\install.ptf
Reference_Design\DE2_NIOS\.sopc_builder
Reference_Design\DE2_NIOS\altpllpll_0.ppf
Reference_Design\DE2_NIOS\Audio_0.v
Reference_Design\DE2_NIOS\Audio_DAC_FIFO\cb_generator.pl
Reference_Design\DE2_NIOS\Audio_DAC_FIFO\class.ptf
Reference_Design\DE2_NIOS\Audio_DAC_FIFO\hdl\AUDIO_DAC_FIFO.v
Reference_Design\DE2_NIOS\Audio_DAC_FIFO\hdl\FIFO_16_256.v
Reference_Design\DE2_NIOS\Audio_DAC_FIFO\hdl
Reference_Design\DE2_NIOS\Audio_DAC_FIFO
Reference_Design\DE2_NIOS\AUDIO_DAC_FIFO.v
Reference_Design\DE2_NIOS\Audio_PLL.ppf
Reference_Design\DE2_NIOS\Audio_PLL.v
Reference_Design\DE2_NIOS\bht_ram.mif
Reference_Design\DE2_NIOS\Binary_VGA_Controller\cb_generator.pl
Reference_Design\DE2_NIOS\Binary_VGA_Controller\class.ptf
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl\Img_DATA.hex
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl\Img_RAM.v
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl\VGA_Controller.v
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl\VGA_NIOS_CTRL.v
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl\VGA_OSD_RAM.v
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl\VGA_Param.h
Reference_Design\DE2_NIOS\Binary_VGA_Controller\hdl
Reference_Design\DE2_NIOS\Binary_VGA_Controller\inc\VGA.c
Reference_Design\DE2_NIOS\Binary_VGA_Controller\inc\VGA.h
Reference_Design\DE2_NIOS\Binary_VGA_Controller\inc
Reference_Design\DE2_NIOS\Binary_VGA_Controller
Reference_Design\DE2_NIOS\button_pio.v
Reference_Design\DE2_NIOS\clock_0.v
Reference_Design\DE2_NIOS\clock_1.v
Reference_Design\DE2_NIOS\cmp_state.ini
Reference_Design\DE2_NIOS\cpu_0.ocp
Reference_Design\DE2_NIOS\cpu_0.v
Reference_Design\DE2_NIOS\cpu_0.vo
Reference_Design\DE2_NIOS\cpu_0_bht_ram.mif
Reference_Design\DE2_NIOS\cpu_0_dc_tag_ram.mif
Reference_Design\DE2_NIOS\cpu_0_ic_tag_ram.mif
Reference_Design\DE2_NIOS\cpu_0_jtag_debug_module.v
Reference_Design\DE2_NIOS\cpu_0_jtag_debug_module_wrapper.v
Reference_Design\DE2_NIOS\cpu_0_mult_cell.v
Reference_Design\DE2_NIOS\cpu_0_ociram_default_contents.mif
Reference_Design\DE2_NIOS\cpu_0_rf_ram_a.mif
Reference_Design\DE2_NIOS\cpu_0_rf_ram_b.mif
Reference_Design\DE2_NIOS\cpu_0_test_bench.v
Reference_Design\DE2_NIOS\dc_tag_ram.mif
Reference_Design\DE2_NIOS\DE2_Board\class.ptf
Reference_Design\DE2_NIOS\DE2_Board\system\.sopc_builder\install.ptf
Reference_Design\DE2_NIOS\DE2_Board\system\.sopc_builder
Reference_Design\DE2_NIOS\DE2_Board\system\asmi.v
Reference_Design\DE2_NIOS\DE2_Board\system\cmp_state.ini
Reference_Design\DE2_NIOS\DE2_Board\system\cpu_0.ocp
Reference_Design\DE2_NIOS\DE2_Board\system\cpu_0.v
Reference_Design\DE2_NIOS\DE2_Board\system\cpu_0_test_bench.v
Reference_Design\DE2_NIOS\DE2_Board\system\data_RAM.hex
Reference_Design\DE2_NIOS\DE2_Board\system\data_RAM.v
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.asm.rpt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.bsf
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.cdf
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.done
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.fit.eqn
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.fit.rpt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.fit.summary
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.flow.rpt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.map.eqn
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.map.rpt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.map.summary
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.pin
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.pof
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.ptf
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.ptf.5.00
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.ptf.bak
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.qpf
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.qsf
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.qws
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.sof
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.tan.rpt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.tan.summary
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board.v
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_assignment_defaults.qdf
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_generation_script
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_log.txt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_setup_quartus.tcl
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_sim\atail-f.pl
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_sim\contents_file_warning.txt
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_sim\jtag_uart_0_input_mutex.dat
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_sim\jtag_uart_0_input_stream.dat
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_sim\jtag_uart_0_output_stream.dat
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_sim
Reference_Design\DE2_NIOS\DE2_Board\system\DE2_Board_top.bdf
Reference_Design\DE2_NIOS\DE2_Board\system\delay_reset_block.bdf
Reference_Design\DE2_NIOS\DE2_Board\system\firmware_ROM.hex
Reference_Design\DE2_NIOS\DE2_Board\system\firmware_ROM.v
Reference_Design\DE2_NIOS\DE2_Board\system\jtag_uart_0.v
Reference_Design\DE2_NIOS\DE2_Board\system\payload_buffer.hex
Reference_Design\DE2_NIOS\DE2_Board\system\payload_buffer.v
Reference_Design\DE2_NIOS\DE2_Board\system\reset_counter.v
Reference_Design\DE2_NIOS\DE2_Board\system\rf_ram.mif
Reference_Design\DE2_NIOS\DE2_Board\system\sopc_builder_debug_log.txt
Reference_Design\DE2_NIOS\DE2_Board\system\sysid.v
Reference_Design\DE2_NIOS\DE2_Board\system
Reference_Design\DE2_NIOS\DE2_Board
Reference_Design\DE2_NIOS\DE2_NIOS.asm.rpt
Reference_Design\DE2_NIOS\DE2_NIOS.done
Reference_Design\DE2_NIOS\DE2_NIOS.fit.rpt
Reference_Design\DE2_NIOS\DE2_NIOS.fit.smsg
Reference_Design\DE2_NIOS\DE2_NIOS.fit.summary
Reference_Design\DE2_NIOS\DE2_NIOS.flow.rpt
Reference_Design\DE2_NIOS\DE2_NIOS.map.rpt
Reference_Design\DE2_NIOS\DE2_NIOS.map.smsg
Reference_Design\DE2_NIOS\DE2_NIOS.map.summary
Reference_Design\DE2_NIOS\DE2_NIOS.pin
Reference_Design\DE2_NIOS\DE2_NIOS.pof
Reference_Design\DE2_NIOS\DE2_NIOS.qpf
Reference_Design\DE2_NIOS\DE2_NIOS.qsf
Reference_Design\DE2_NIOS\DE2_NIOS.qws
Reference_Design\DE2_NIOS\DE2_NIOS.sof
Reference_Design\DE2_NIOS\DE2_NIOS.tan.rpt
Reference_Design\DE2_NIOS\DE2_NIOS.tan.summary
Reference_Design\DE2_NIOS\DE2_NIOS.v
Reference_Design\DE2_NIOS\DM9000A\cb_generator.pl
Reference_Design\DE2_NIOS\DM9000A\class.ptf
Reference_Design\DE2_NIOS\DM9000A\hdl\DM9000A_IF.v
Reference_Design\DE2_NIOS\DM9000A\hdl
Reference_Design\DE2_NIOS\DM9000A\inc\basic_io.h
Reference_Design\DE2_NIOS\DM9000A\inc\DM9000A.C
Reference_Design\DE2_NIOS\DM9000A\inc\DM9000A.H
Reference_Design\DE2_NIOS\DM9000A\inc
Reference_Design\DE2_NIOS\DM9000A
Reference_Design\DE2_NIOS\DM9000A.v
Reference_Design\DE2_NIOS\DM9000A_IF.v
Reference_Design\DE2_NIOS\epcs_controller.v
Reference_Design\DE2_NIOS\epcs_controller_boot_rom.hex
Reference_Design\DE2_NIOS\FIFO_16_256.v
Reference_Design\DE2_NIOS\I2C_AV_Config.v
Reference_Design\DE2_NIOS\I2C_Controller.v
Reference_Design\DE2_NIOS\ic_tag_ram.mif
Reference_Design\DE2_NIOS\Img_DATA.hex
Reference_Design\DE2_NIOS\Img_RAM.v
Reference_Design\DE2_NIOS\ISP1362\cb_generator.pl
Reference_Design\DE2_NIOS\ISP1362\class.ptf
Reference_Design\DE2_NIOS\ISP1362\hdl\ISP1362_IF.v
Reference_Design\DE2_NIOS\ISP1362\hdl
Reference_Design\DE2_NIOS\ISP1362\inc\BASICTYP.H
Reference_Design\DE2_NIOS\ISP1362\inc\COMMON.H
Reference_Design\DE2_NIOS\ISP1362\inc\HAL4D13.C
Reference_Design\DE2_NIOS\ISP1362\inc\HAL4D13.H
Reference_Design\DE2_NIOS\ISP1362\inc\usb_irq.c
Reference_Design\DE2_NIOS\ISP1362\inc\usb_irq.h
Reference_Design\DE2_NIOS\ISP1362\inc
Reference_Design\DE2_NIOS\ISP1362
Reference_Design\DE2_NIOS\ISP1362.v
Reference_Design\DE2_NIOS\ISP1362_IF.v
Reference_Design\DE2_NIOS\jtag_uart_0.v
Reference_Design\DE2_NIOS\lcd_16207_0.v
Reference_Design\DE2_NIOS\led_green.v
Reference_Design\DE2_NIOS\led_red.v
Reference_Design\DE2_NIOS\Reset_Delay.v
Reference_Design\DE2_NIOS\rf_ram_a.mif
Reference_Design\DE2_NIOS\rf_ram_b.mif
Reference_Design\DE2_NIOS\sdram_0.v
Reference_Design\DE2_NIOS\sdram_0_test_component.v
Reference_Design\DE2_NIOS\SDRAM_PLL.ppf
Reference_Design\DE2_NIOS\SDRAM_PLL.v
Reference_Design\DE2_NIOS\SD_CLK.v
Reference_Design\DE2_NIOS\SD_CMD.v
Reference_Design\DE2_NIOS\SD_DAT.v
Reference_Design\DE2_NIOS\SEG7_Display.v
Reference_Design\DE2_NIOS\SEG7_LUT.v
Reference_Design\DE2_NIOS\SEG7_LUT_8\cb_generator.pl
Reference_Design\DE2_NIOS\SEG7_LUT_8\class.ptf
Reference_Design\DE2_NIOS\SEG7_LUT_8\hdl\SEG7_LUT.v
Reference_Design\DE2_NIOS\SEG7_LUT_8\hdl\SEG7_LUT_8.v
Reference_Design\DE2_NIOS\SEG7_LUT_8\hdl
Reference_Design\DE2_NIOS\SEG7_LUT_8\inc\basic_io.h
Reference_Design\DE2_NIOS\SEG7_LUT_8\inc
Reference_Design\DE2_NIOS\SEG7_LUT_8
Reference_Design\DE2_NIOS\SEG7_LUT_8.v
Reference_Design\DE2_NIOS\sopc_builder_debug_log.txt
Reference_Design\DE2_NIOS\sram_0.v
Reference_Design\DE2_NIOS\SRAM_16Bit_512K\cb_generator.pl
Reference_Design\DE2_NIOS\SRAM_16Bit_512K\class.ptf
Reference_Design\DE2_NIOS\SRAM_16Bit_512K\hdl\SRAM_16Bit_512K.v
Reference_Design\DE2_NIOS\SRAM_16Bit_512K\hdl
Reference_Design\DE2_NIOS\SRAM_16Bit_512K
Reference_Design\DE2_NIOS\SRAM_16Bit_512K.v
Reference_Design\DE2_NIOS\switch_pio.v
Reference_Design\DE2_NIOS\system_0.bsf
Reference_Design\DE2_NIOS\system_0.ptf
Reference_Design\DE2_NIOS\system_0.ptf.bak
Reference_Design\DE2_NIOS\system_0.v
Reference_Design\DE2_NIOS\system_0_generation_script
Reference_Design\DE2_NIOS\system_0_log.txt
Reference_Design\DE2_NIOS\system_0_setup_quartus.tcl
Reference_Design\DE2_NIOS\system_0_sim\atail-f.pl
Reference_Design\DE2_NIOS\system_0_sim\jtag_uart_0_input_mutex.dat
Reference_Design\DE2_NIOS\system_0_sim\jtag_uart_0_input_stream.dat
Reference_Design\DE2_NIOS\system_0_sim\jtag_uart_0_output_stream.dat
Reference_Design\DE2_NIOS\system_0_sim\uart_0_input_data_mutex.dat
Reference_Design\DE2_NIOS\system_0_sim\uart_0_input_data_stream.dat
Reference_Design\DE2_NIOS\system_0_sim\uart_0_log_module.txt
Reference_Design\DE2_NIOS\system_0_sim
Reference_Design\DE2_NIOS\timer_0.v
Reference_Design\DE2_NIOS\timer_1.v
Reference_Design\DE2_NIOS\uart_0.v
Reference_Design\DE2_NIOS\VGA_0.v
Reference_Design\DE2_NIOS\VGA_Controller.v
Reference_Design\DE2_NIOS\VGA_NIOS_CTRL.v
Reference_Design\DE2_NIOS\VGA_OSD_RAM.v
Reference_Design\DE2_NIOS\VGA_Param.h
Reference_Design\DE2_NIOS
Reference_Design

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 本站是交换下载平台,提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度更多...
  • 请直接用浏览器下载本站内容,不要使用迅雷之类的下载软件,用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.

相关评论

暂无评论内容.

发表评论

*主  题:
*内  容:
*验 证 码:

源码中国 www.ymcn.org