文件名称:P4_PPC_SDRAM_Reference_Design
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SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief
descr iption of each sub-section. The design consists of:
· PowerPC processor
· PLB-OPB bridge
· BlockRAM Memory Controller
· SDRAM Controller
· Two GPIO ports
· A UART Port
· External SDRAM
descr iption of each sub-section. The design consists of:
· PowerPC processor
· PLB-OPB bridge
· BlockRAM Memory Controller
· SDRAM Controller
· Two GPIO ports
· A UART Port
· External SDRAM
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