文件名称:sin
介绍说明－－下载内容均来自于网络，请自行研究使用
基于fpga的正弦波发生器设计，有一定的参考价值，写的比较详细-The sine wave generator based on FPGA design, have a certain reference value, a more detailed written
相关搜索： sin
VHDL
sin
正弦波
sin
wave
using
vhdl
信号发生器
vhdl
sin
vhdl
sin
vhdl
FPGA
VHDL
sine
wave
generator
sine
generator
software
vhdl
VHDL
sin
正弦波
sin
wave
using
vhdl
信号发生器
vhdl
sin
vhdl
sin
vhdl
FPGA
VHDL
sine
wave
generator
sine
generator
software
vhdl
(系统自动生成,下载前可以参看下载内容)
下载文件列表
sin
...\adder10b.vhd
...\adder32b.vhd
...\and2.vhd
...\and2ab.vhd
...\cmp_state.ini
...\db
...\..\altsyncram_2q92.tdf
...\..\altsyncram_40u.tdf
...\..\altsyncram_cvr.tdf
...\..\altsyncram_eui2.tdf
...\..\altsyncram_o351.tdf
...\..\altsyncram_qqb2.tdf
...\..\cntr_8b8.tdf
...\..\cntr_pd8.tdf
...\..\dds_vhdl.asm.qmsg
...\..\dds_vhdl.cbx.xml
...\..\dds_vhdl.cmp.cdb
...\..\dds_vhdl.cmp.hdb
...\..\dds_vhdl.cmp.kpt
...\..\dds_vhdl.cmp.logdb
...\..\dds_vhdl.cmp.rdb
...\..\dds_vhdl.cmp.tdb
...\..\dds_vhdl.cmp0.ddb
...\..\dds_vhdl.dbp
...\..\dds_vhdl.db_info
...\..\dds_vhdl.eco.cdb
...\..\dds_vhdl.fit.qmsg
...\..\dds_vhdl.hier_info
...\..\dds_vhdl.hif
...\..\dds_vhdl.map.cdb
...\..\dds_vhdl.map.hdb
...\..\dds_vhdl.map.logdb
...\..\dds_vhdl.map.qmsg
...\..\dds_vhdl.pre_map.cdb
...\..\dds_vhdl.pre_map.hdb
...\..\dds_vhdl.psp
...\..\dds_vhdl.rpp.qmsg
...\..\dds_vhdl.rtlv.hdb
...\..\dds_vhdl.rtlv_sg.cdb
...\..\dds_vhdl.rtlv_sg_swap.cdb
...\..\dds_vhdl.sgate.rvd
...\..\dds_vhdl.sgate_sm.rvd
...\..\dds_vhdl.sgdiff.cdb
...\..\dds_vhdl.sgdiff.hdb
...\..\dds_vhdl.signalprobe.cdb
...\..\dds_vhdl.sld_design_entry.sci
...\..\dds_vhdl.sld_design_entry_dsc.sci
...\..\dds_vhdl.syn_hier_info
...\..\dds_vhdl.tan.qmsg
...\..\dds_vhdl_cmp.qrpt
...\..\dds_vhdl_sim.qrpt
...\..\decode_9ie.tdf
...\..\decode_ogi.tdf
...\..\wed.zsf
...\dds_vhdl.asm.rpt
...\dds_vhdl.done
...\dds_vhdl.fit.eqn
...\dds_vhdl.fit.rpt
...\dds_vhdl.fit.smsg
...\dds_vhdl.fit.summary
...\dds_vhdl.flow.rpt
...\dds_vhdl.map.eqn
...\dds_vhdl.map.rpt
...\dds_vhdl.map.summary
...\dds_vhdl.pin
...\dds_vhdl.pof
...\dds_vhdl.qpf
...\dds_vhdl.qsf
...\dds_vhdl.qws
...\dds_vhdl.sim.rpt
...\dds_vhdl.sof
...\dds_vhdl.tan.rpt
...\dds_vhdl.tan.summary
...\dds_vhdl.vhd
...\dds_vhdl.vwf
...\dds_vhdl_assignment_defaults.qdf
...\pll1.bsf
...\pll1.cmp
...\pll1.vhd
...\reg10b.vhd
...\reg32b.vhd
...\romd.mif
...\sim.cfg
...\sin_rom.bsf
...\sin_rom.cmp
...\sin_rom.vhd
...\正弦波采样数据.txt
...\adder10b.vhd
...\adder32b.vhd
...\and2.vhd
...\and2ab.vhd
...\cmp_state.ini
...\db
...\..\altsyncram_2q92.tdf
...\..\altsyncram_40u.tdf
...\..\altsyncram_cvr.tdf
...\..\altsyncram_eui2.tdf
...\..\altsyncram_o351.tdf
...\..\altsyncram_qqb2.tdf
...\..\cntr_8b8.tdf
...\..\cntr_pd8.tdf
...\..\dds_vhdl.asm.qmsg
...\..\dds_vhdl.cbx.xml
...\..\dds_vhdl.cmp.cdb
...\..\dds_vhdl.cmp.hdb
...\..\dds_vhdl.cmp.kpt
...\..\dds_vhdl.cmp.logdb
...\..\dds_vhdl.cmp.rdb
...\..\dds_vhdl.cmp.tdb
...\..\dds_vhdl.cmp0.ddb
...\..\dds_vhdl.dbp
...\..\dds_vhdl.db_info
...\..\dds_vhdl.eco.cdb
...\..\dds_vhdl.fit.qmsg
...\..\dds_vhdl.hier_info
...\..\dds_vhdl.hif
...\..\dds_vhdl.map.cdb
...\..\dds_vhdl.map.hdb
...\..\dds_vhdl.map.logdb
...\..\dds_vhdl.map.qmsg
...\..\dds_vhdl.pre_map.cdb
...\..\dds_vhdl.pre_map.hdb
...\..\dds_vhdl.psp
...\..\dds_vhdl.rpp.qmsg
...\..\dds_vhdl.rtlv.hdb
...\..\dds_vhdl.rtlv_sg.cdb
...\..\dds_vhdl.rtlv_sg_swap.cdb
...\..\dds_vhdl.sgate.rvd
...\..\dds_vhdl.sgate_sm.rvd
...\..\dds_vhdl.sgdiff.cdb
...\..\dds_vhdl.sgdiff.hdb
...\..\dds_vhdl.signalprobe.cdb
...\..\dds_vhdl.sld_design_entry.sci
...\..\dds_vhdl.sld_design_entry_dsc.sci
...\..\dds_vhdl.syn_hier_info
...\..\dds_vhdl.tan.qmsg
...\..\dds_vhdl_cmp.qrpt
...\..\dds_vhdl_sim.qrpt
...\..\decode_9ie.tdf
...\..\decode_ogi.tdf
...\..\wed.zsf
...\dds_vhdl.asm.rpt
...\dds_vhdl.done
...\dds_vhdl.fit.eqn
...\dds_vhdl.fit.rpt
...\dds_vhdl.fit.smsg
...\dds_vhdl.fit.summary
...\dds_vhdl.flow.rpt
...\dds_vhdl.map.eqn
...\dds_vhdl.map.rpt
...\dds_vhdl.map.summary
...\dds_vhdl.pin
...\dds_vhdl.pof
...\dds_vhdl.qpf
...\dds_vhdl.qsf
...\dds_vhdl.qws
...\dds_vhdl.sim.rpt
...\dds_vhdl.sof
...\dds_vhdl.tan.rpt
...\dds_vhdl.tan.summary
...\dds_vhdl.vhd
...\dds_vhdl.vwf
...\dds_vhdl_assignment_defaults.qdf
...\pll1.bsf
...\pll1.cmp
...\pll1.vhd
...\reg10b.vhd
...\reg32b.vhd
...\romd.mif
...\sim.cfg
...\sin_rom.bsf
...\sin_rom.cmp
...\sin_rom.vhd
...\正弦波采样数据.txt