文件名称:rtl
介绍说明－－下载内容均来自于网络，请自行研究使用
DDR控制器
已通过FPGA 验证
大家不要错过哦-DDR controller has passed FPGA to verify that we will not miss Oh
已通过FPGA 验证
大家不要错过哦-DDR controller has passed FPGA to verify that we will not miss Oh
(系统自动生成,下载前可以参看下载内容)
下载文件列表
rtl
...\mem_interface_top.vhd
...\mem_interface_top_addr_gen_0.vhd
...\mem_interface_top_backend_fifos_0.vhd
...\mem_interface_top_backend_rom_0.vhd
...\mem_interface_top_cmp_rd_data_0.vhd
...\mem_interface_top_controller_iobs_0.vhd
...\mem_interface_top_data_gen_16.vhd
...\mem_interface_top_data_path_0.vhd
...\mem_interface_top_data_path_iobs_0.vhd
...\mem_interface_top_data_tap_inc.vhd
...\mem_interface_top_data_write_0.vhd
...\mem_interface_top_ddr_controller_0.vhd
...\mem_interface_top_idelay_ctrl.vhd
...\mem_interface_top_infrastructure.vhd
...\mem_interface_top_infrastructure_iobs_0.vhd
...\mem_interface_top_iobs_0.vhd
...\mem_interface_top_main_0.vhd
...\mem_interface_top_parameters_0.vhd
...\mem_interface_top_pattern_compare8.vhd
...\mem_interface_top_RAM_D_0.vhd
...\mem_interface_top_rd_data_0.vhd
...\mem_interface_top_rd_data_fifo_0.vhd
...\mem_interface_top_rd_wr_addr_fifo_0.vhd
...\mem_interface_top_tap_ctrl_0.vhd
...\mem_interface_top_tap_logic_0.vhd
...\mem_interface_top_test_bench_0.vhd
...\mem_interface_top_top_0.vhd
...\mem_interface_top_user_interface_0.vhd
...\mem_interface_top_v4_dm_iob.vhd
...\mem_interface_top_v4_dqs_iob.vhd
...\mem_interface_top_v4_dq_iob.vhd
...\mem_interface_top_wr_data_fifo_16.vhd
...\mem_interface_top.vhd
...\mem_interface_top_addr_gen_0.vhd
...\mem_interface_top_backend_fifos_0.vhd
...\mem_interface_top_backend_rom_0.vhd
...\mem_interface_top_cmp_rd_data_0.vhd
...\mem_interface_top_controller_iobs_0.vhd
...\mem_interface_top_data_gen_16.vhd
...\mem_interface_top_data_path_0.vhd
...\mem_interface_top_data_path_iobs_0.vhd
...\mem_interface_top_data_tap_inc.vhd
...\mem_interface_top_data_write_0.vhd
...\mem_interface_top_ddr_controller_0.vhd
...\mem_interface_top_idelay_ctrl.vhd
...\mem_interface_top_infrastructure.vhd
...\mem_interface_top_infrastructure_iobs_0.vhd
...\mem_interface_top_iobs_0.vhd
...\mem_interface_top_main_0.vhd
...\mem_interface_top_parameters_0.vhd
...\mem_interface_top_pattern_compare8.vhd
...\mem_interface_top_RAM_D_0.vhd
...\mem_interface_top_rd_data_0.vhd
...\mem_interface_top_rd_data_fifo_0.vhd
...\mem_interface_top_rd_wr_addr_fifo_0.vhd
...\mem_interface_top_tap_ctrl_0.vhd
...\mem_interface_top_tap_logic_0.vhd
...\mem_interface_top_test_bench_0.vhd
...\mem_interface_top_top_0.vhd
...\mem_interface_top_user_interface_0.vhd
...\mem_interface_top_v4_dm_iob.vhd
...\mem_interface_top_v4_dqs_iob.vhd
...\mem_interface_top_v4_dq_iob.vhd
...\mem_interface_top_wr_data_fifo_16.vhd