文件名称:DIV_CLK
介绍说明－－下载内容均来自于网络，请自行研究使用
除頻code,只要修改數字並接上時脈,即可得到所要的頻率-In addition to the frequency code, as long as the modified digital clock connect, you can get to the frequency of
(系统自动生成,下载前可以参看下载内容)
下载文件列表
DIV_CLK
.......\clock_div.done
.......\clock_div.flow.rpt
.......\clock_div.map.rpt
.......\clock_div.map.summary
.......\clock_div.qpf
.......\clock_div.qsf
.......\clock_div.qws
.......\clock_div.sim.rpt
.......\clock_div.v
.......\clock_div.v.bak
.......\clock_div.vwf
.......\db
.......\..\clock_div.cbx.xml
.......\..\clock_div.cmp.rdb
.......\..\clock_div.dbp
.......\..\clock_div.db_info
.......\..\clock_div.eco.cdb
.......\..\clock_div.eds_overflow
.......\..\clock_div.fnsim.cdb
.......\..\clock_div.fnsim.hdb
.......\..\clock_div.fnsim.qmsg
.......\..\clock_div.hier_info
.......\..\clock_div.hif
.......\..\clock_div.map.bpm
.......\..\clock_div.map.cdb
.......\..\clock_div.map.ecobp
.......\..\clock_div.map.hdb
.......\..\clock_div.map.logdb
.......\..\clock_div.map.qmsg
.......\..\clock_div.map_bb.cdb
.......\..\clock_div.map_bb.hdb
.......\..\clock_div.map_bb.logdb
.......\..\clock_div.pre_map.cdb
.......\..\clock_div.pre_map.hdb
.......\..\clock_div.psp
.......\..\clock_div.pss
.......\..\clock_div.rtlv.hdb
.......\..\clock_div.rtlv_sg.cdb
.......\..\clock_div.rtlv_sg_swap.cdb
.......\..\clock_div.sgdiff.cdb
.......\..\clock_div.sgdiff.hdb
.......\..\clock_div.sim.cvwf
.......\..\clock_div.sim.hdb
.......\..\clock_div.sim.qmsg
.......\..\clock_div.sim.rdb
.......\..\clock_div.sim_ori.vwf
.......\..\clock_div.sld_design_entry.sci
.......\..\clock_div.sld_design_entry_dsc.sci
.......\..\clock_div.syn_hier_info
.......\..\prev_cmp_clock_div.sim.qmsg
.......\..\wed.wsf
.......\prev_cmp_clock_div.qmsg
說明文件.txt
.......\clock_div.done
.......\clock_div.flow.rpt
.......\clock_div.map.rpt
.......\clock_div.map.summary
.......\clock_div.qpf
.......\clock_div.qsf
.......\clock_div.qws
.......\clock_div.sim.rpt
.......\clock_div.v
.......\clock_div.v.bak
.......\clock_div.vwf
.......\db
.......\..\clock_div.cbx.xml
.......\..\clock_div.cmp.rdb
.......\..\clock_div.dbp
.......\..\clock_div.db_info
.......\..\clock_div.eco.cdb
.......\..\clock_div.eds_overflow
.......\..\clock_div.fnsim.cdb
.......\..\clock_div.fnsim.hdb
.......\..\clock_div.fnsim.qmsg
.......\..\clock_div.hier_info
.......\..\clock_div.hif
.......\..\clock_div.map.bpm
.......\..\clock_div.map.cdb
.......\..\clock_div.map.ecobp
.......\..\clock_div.map.hdb
.......\..\clock_div.map.logdb
.......\..\clock_div.map.qmsg
.......\..\clock_div.map_bb.cdb
.......\..\clock_div.map_bb.hdb
.......\..\clock_div.map_bb.logdb
.......\..\clock_div.pre_map.cdb
.......\..\clock_div.pre_map.hdb
.......\..\clock_div.psp
.......\..\clock_div.pss
.......\..\clock_div.rtlv.hdb
.......\..\clock_div.rtlv_sg.cdb
.......\..\clock_div.rtlv_sg_swap.cdb
.......\..\clock_div.sgdiff.cdb
.......\..\clock_div.sgdiff.hdb
.......\..\clock_div.sim.cvwf
.......\..\clock_div.sim.hdb
.......\..\clock_div.sim.qmsg
.......\..\clock_div.sim.rdb
.......\..\clock_div.sim_ori.vwf
.......\..\clock_div.sld_design_entry.sci
.......\..\clock_div.sld_design_entry_dsc.sci
.......\..\clock_div.syn_hier_info
.......\..\prev_cmp_clock_div.sim.qmsg
.......\..\wed.wsf
.......\prev_cmp_clock_div.qmsg
說明文件.txt