文件名称:jianpan
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基于北京革新公司出品的EDA实验工具箱的键盘扫描与同步显示程序。编译环境为quartusll.5.1版本。fpga芯片为EP18CQ240C6-Beijing-based company produced innovative experiments of the EDA toolbox display the keyboard scanning and synchronization process. Quartusll.5.1 version of the compiler environment. FPGA chip for EP18CQ240C6
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下载文件列表
jianpan
.......\jianpan
.......\.......\db
.......\.......\..\jianpan.asm.qmsg
.......\.......\..\jianpan.cbx.xml
.......\.......\..\jianpan.cmp.cdb
.......\.......\..\jianpan.cmp.hdb
.......\.......\..\jianpan.cmp.qrpt
.......\.......\..\jianpan.cmp.rdb
.......\.......\..\jianpan.cmp.tdb
.......\.......\..\jianpan.cmp0.ddb
.......\.......\..\jianpan.dbp
.......\.......\..\jianpan.db_info
.......\.......\..\jianpan.eco.cdb
.......\.......\..\jianpan.fit.qmsg
.......\.......\..\jianpan.hier_info
.......\.......\..\jianpan.hif
.......\.......\..\jianpan.map.cdb
.......\.......\..\jianpan.map.hdb
.......\.......\..\jianpan.map.qmsg
.......\.......\..\jianpan.pre_map.cdb
.......\.......\..\jianpan.pre_map.hdb
.......\.......\..\jianpan.psp
.......\.......\..\jianpan.rtlv.hdb
.......\.......\..\jianpan.rtlv_sg.cdb
.......\.......\..\jianpan.rtlv_sg_swap.cdb
.......\.......\..\jianpan.sgdiff.cdb
.......\.......\..\jianpan.sgdiff.hdb
.......\.......\..\jianpan.signalprobe.cdb
.......\.......\..\jianpan.sld_design_entry.sci
.......\.......\..\jianpan.sld_design_entry_dsc.sci
.......\.......\..\jianpan.syn_hier_info
.......\.......\..\jianpan.tan.qmsg
.......\.......\jianpan.asm.rpt
.......\.......\jianpan.cdf
.......\.......\jianpan.done
.......\.......\jianpan.fit.eqn
.......\.......\jianpan.fit.rpt
.......\.......\jianpan.fit.summary
.......\.......\jianpan.flow.rpt
.......\.......\jianpan.map.eqn
.......\.......\jianpan.map.rpt
.......\.......\jianpan.map.summary
.......\.......\jianpan.pin
.......\.......\jianpan.pof
.......\.......\jianpan.qpf
.......\.......\jianpan.qsf
.......\.......\jianpan.qws
.......\.......\jianpan.sof
.......\.......\jianpan.tan.rpt
.......\.......\jianpan.tan.summary
.......\.......\jianpan.vhd
.......\.......\jianpan.vwf
.......\.......\Vhdl1.vhd
.......\jianpan
.......\.......\db
.......\.......\..\jianpan.asm.qmsg
.......\.......\..\jianpan.cbx.xml
.......\.......\..\jianpan.cmp.cdb
.......\.......\..\jianpan.cmp.hdb
.......\.......\..\jianpan.cmp.qrpt
.......\.......\..\jianpan.cmp.rdb
.......\.......\..\jianpan.cmp.tdb
.......\.......\..\jianpan.cmp0.ddb
.......\.......\..\jianpan.dbp
.......\.......\..\jianpan.db_info
.......\.......\..\jianpan.eco.cdb
.......\.......\..\jianpan.fit.qmsg
.......\.......\..\jianpan.hier_info
.......\.......\..\jianpan.hif
.......\.......\..\jianpan.map.cdb
.......\.......\..\jianpan.map.hdb
.......\.......\..\jianpan.map.qmsg
.......\.......\..\jianpan.pre_map.cdb
.......\.......\..\jianpan.pre_map.hdb
.......\.......\..\jianpan.psp
.......\.......\..\jianpan.rtlv.hdb
.......\.......\..\jianpan.rtlv_sg.cdb
.......\.......\..\jianpan.rtlv_sg_swap.cdb
.......\.......\..\jianpan.sgdiff.cdb
.......\.......\..\jianpan.sgdiff.hdb
.......\.......\..\jianpan.signalprobe.cdb
.......\.......\..\jianpan.sld_design_entry.sci
.......\.......\..\jianpan.sld_design_entry_dsc.sci
.......\.......\..\jianpan.syn_hier_info
.......\.......\..\jianpan.tan.qmsg
.......\.......\jianpan.asm.rpt
.......\.......\jianpan.cdf
.......\.......\jianpan.done
.......\.......\jianpan.fit.eqn
.......\.......\jianpan.fit.rpt
.......\.......\jianpan.fit.summary
.......\.......\jianpan.flow.rpt
.......\.......\jianpan.map.eqn
.......\.......\jianpan.map.rpt
.......\.......\jianpan.map.summary
.......\.......\jianpan.pin
.......\.......\jianpan.pof
.......\.......\jianpan.qpf
.......\.......\jianpan.qsf
.......\.......\jianpan.qws
.......\.......\jianpan.sof
.......\.......\jianpan.tan.rpt
.......\.......\jianpan.tan.summary
.......\.......\jianpan.vhd
.......\.......\jianpan.vwf
.......\.......\Vhdl1.vhd