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verilog源代码
王金明教程用的配套代码和一些可综合代码-Wang Jinming tutorials Verilog source code with the matching code and some code can be integrated
王金明教程用的配套代码和一些可综合代码-Wang Jinming tutorials Verilog source code with the matching code and some code can be integrated
(系统自动生成,下载前可以参看下载内容)
下载文件列表
chap10
......\acc.acf
......\acc.hif
......\acc.v
......\accn.v
......\add8.v
......\adder8.v
......\block1.v
......\block2.v
......\block3.v
......\block4.v
......\control.v
......\fsm.v
......\longframe1.v
......\longframe2.v
......\pipeline.v
......\reg8.v
......\resource1.v
......\resource2.v
chap11
......\account.v
......\clock.v
......\count10.v
......\fre_ctrl.v
......\latch_16.v
......\paobiao.v
......\sell.v
......\song.v
......\traffic.v
chap12
......\add_ahead.v
......\add_bx.v
......\add_jl.v
......\add_tree.v
......\correlator.v
......\crc.v
......\cycle.v
......\decoder1.v
......\decoder2.v
......\fir.v
......\linear.v
......\mult.v
......\mult4x4.v
chap3
.....\adder4.acf
.....\adder4.hif
.....\adder4.ndb
.....\adder4.v
.....\adder_tp.v
.....\aoi.v
.....\count4.v
.....\count4_tp.v
chap5
.....\adder.v
.....\adder16.v
.....\alu.v
.....\block.v
.....\buried_ff.v
.....\compile.v
.....\count.v
.....\count60.v
.....\decode4_7.v
.....\loop1.v
.....\loop2.v
.....\loop3.v
.....\modelsim.ini
.....\mult_for.v
.....\mult_repeat.v
.....\mux21_1.v
.....\mux21_2.v
.....\mux4_1.v
.....\mux_casez.v
.....\non_block.v
.....\test.v
.....\transcript
.....\vish_stacktrace.vstf
.....\voter7.v
.....\wave1.v
.....\wave2.v
.....\work
.....\....\decode4_7
.....\....\.........\verilog.asm
.....\....\.........\_primary.dat
.....\....\.........\_primary.vhd
.....\....\_info
chap6
.....\alutask.v
.....\alu_tp.v
.....\code_83.v
.....\count.v
.....\funct.v
.....\funct_tp.v
.....\paral1.v
.....\paral2.v
.....\serial1.v
.....\serial2.v
chap7
.....\add4_1.v
.....\add4_2.v
.....\add4_3.v
......\acc.acf
......\acc.hif
......\acc.v
......\accn.v
......\add8.v
......\adder8.v
......\block1.v
......\block2.v
......\block3.v
......\block4.v
......\control.v
......\fsm.v
......\longframe1.v
......\longframe2.v
......\pipeline.v
......\reg8.v
......\resource1.v
......\resource2.v
chap11
......\account.v
......\clock.v
......\count10.v
......\fre_ctrl.v
......\latch_16.v
......\paobiao.v
......\sell.v
......\song.v
......\traffic.v
chap12
......\add_ahead.v
......\add_bx.v
......\add_jl.v
......\add_tree.v
......\correlator.v
......\crc.v
......\cycle.v
......\decoder1.v
......\decoder2.v
......\fir.v
......\linear.v
......\mult.v
......\mult4x4.v
chap3
.....\adder4.acf
.....\adder4.hif
.....\adder4.ndb
.....\adder4.v
.....\adder_tp.v
.....\aoi.v
.....\count4.v
.....\count4_tp.v
chap5
.....\adder.v
.....\adder16.v
.....\alu.v
.....\block.v
.....\buried_ff.v
.....\compile.v
.....\count.v
.....\count60.v
.....\decode4_7.v
.....\loop1.v
.....\loop2.v
.....\loop3.v
.....\modelsim.ini
.....\mult_for.v
.....\mult_repeat.v
.....\mux21_1.v
.....\mux21_2.v
.....\mux4_1.v
.....\mux_casez.v
.....\non_block.v
.....\test.v
.....\transcript
.....\vish_stacktrace.vstf
.....\voter7.v
.....\wave1.v
.....\wave2.v
.....\work
.....\....\decode4_7
.....\....\.........\verilog.asm
.....\....\.........\_primary.dat
.....\....\.........\_primary.vhd
.....\....\_info
chap6
.....\alutask.v
.....\alu_tp.v
.....\code_83.v
.....\count.v
.....\funct.v
.....\funct_tp.v
.....\paral1.v
.....\paral2.v
.....\serial1.v
.....\serial2.v
chap7
.....\add4_1.v
.....\add4_2.v
.....\add4_3.v