文件名称:JPEG_Encode_verilog
介绍说明--下载内容均来自于网络,请自行研究使用
Verilog源代码,用来实现JPEG的编码-Verilog source code, used for JPEG encoding
(系统自动生成,下载前可以参看下载内容)
下载文件列表
JPEG_Encode_verilog
...................\dct
...................\...\dct.v
...................\...\dctu.v
...................\...\dctub.v
...................\...\dct_bench
...................\...\.........\bench_top.v
...................\...\dct_cos_table.v
...................\...\dct_mac.v
...................\...\dct_syn.v
...................\...\fdct.v
...................\...\huffman
...................\...\.......\bench
...................\...\.......\.....\bench_top.v
...................\...\.......\.....\generic_dpram.v
...................\...\.......\.....\generic_fifo_lfsr.v
...................\...\.......\.....\lfsr.v
...................\...\.......\.....\timescale.v
...................\...\.......\huffman_dec.v
...................\...\.......\huffman_enc.v
...................\...\.......\huffman_tables.v
...................\...\ro_cnt.v
...................\...\rtl_sim
...................\...\.......\Makefile.txt
...................\...\ud_cnt.v
...................\...\zigzag.v
...................\jpeg
...................\....\bench_top
...................\....\.........\jpeg_encoder.v
...................\....\jpeg_encoder.v
...................\....\sim
...................\....\...\cds.lib
...................\....\...\hdl.var
...................\....\...\Makefile.txt
...................\qnr
...................\...\attic
...................\...\.....\div.v
...................\...\.....\div_us.v
...................\...\.....\ro_cnt.v
...................\...\.....\ud_cnt.v
...................\...\bench
...................\...\.....\bench_div_top.v
...................\...\.....\bench_qnr_top.v
...................\...\.....\timescale.v
...................\...\div_su.v
...................\...\div_uu.v
...................\...\jpeg_qnr.v
...................\rgb2ycrcb
...................\.........\modelsim.ini
...................\.........\rgb2ycrcb
...................\.........\.........\_info
...................\.........\rgb2ycrcb.mpf
...................\.........\rgb2ycrcb.v
...................\.........\rgb2ycrcb_testbench.v
...................\.........\rgb2ycrcb_webAddress.txt
...................\.........\tcl_stacktrace.txt
...................\.........\transcript
...................\.........\work
...................\.........\....\_info
...................\run_length_coding
...................\.................\attic
...................\.................\.....\jpeg_rle2.v
...................\.................\bench
...................\.................\.....\bench.v.txt
...................\.................\jpeg_rle.v
...................\.................\jpeg_rle1.v
...................\.................\jpeg_rzs.v
...................\dct
...................\...\dct.v
...................\...\dctu.v
...................\...\dctub.v
...................\...\dct_bench
...................\...\.........\bench_top.v
...................\...\dct_cos_table.v
...................\...\dct_mac.v
...................\...\dct_syn.v
...................\...\fdct.v
...................\...\huffman
...................\...\.......\bench
...................\...\.......\.....\bench_top.v
...................\...\.......\.....\generic_dpram.v
...................\...\.......\.....\generic_fifo_lfsr.v
...................\...\.......\.....\lfsr.v
...................\...\.......\.....\timescale.v
...................\...\.......\huffman_dec.v
...................\...\.......\huffman_enc.v
...................\...\.......\huffman_tables.v
...................\...\ro_cnt.v
...................\...\rtl_sim
...................\...\.......\Makefile.txt
...................\...\ud_cnt.v
...................\...\zigzag.v
...................\jpeg
...................\....\bench_top
...................\....\.........\jpeg_encoder.v
...................\....\jpeg_encoder.v
...................\....\sim
...................\....\...\cds.lib
...................\....\...\hdl.var
...................\....\...\Makefile.txt
...................\qnr
...................\...\attic
...................\...\.....\div.v
...................\...\.....\div_us.v
...................\...\.....\ro_cnt.v
...................\...\.....\ud_cnt.v
...................\...\bench
...................\...\.....\bench_div_top.v
...................\...\.....\bench_qnr_top.v
...................\...\.....\timescale.v
...................\...\div_su.v
...................\...\div_uu.v
...................\...\jpeg_qnr.v
...................\rgb2ycrcb
...................\.........\modelsim.ini
...................\.........\rgb2ycrcb
...................\.........\.........\_info
...................\.........\rgb2ycrcb.mpf
...................\.........\rgb2ycrcb.v
...................\.........\rgb2ycrcb_testbench.v
...................\.........\rgb2ycrcb_webAddress.txt
...................\.........\tcl_stacktrace.txt
...................\.........\transcript
...................\.........\work
...................\.........\....\_info
...................\run_length_coding
...................\.................\attic
...................\.................\.....\jpeg_rle2.v
...................\.................\bench
...................\.................\.....\bench.v.txt
...................\.................\jpeg_rle.v
...................\.................\jpeg_rle1.v
...................\.................\jpeg_rzs.v