文件名称:ep1c3_12_8_gwdvpb
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基于fpga和sopc的用VHDL语言编写的EDA等精度频率设计-FPGA and SOPC based on the use of VHDL language, such as precision frequency EDA design
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EP1C3_12_8_GWDVPB
.................\cmp_state.ini
.................\ETESTER.asm.rpt
.................\ETESTER.CDF
.................\ETESTER.done
.................\ETESTER.fit.eqn
.................\ETESTER.fit.rpt
.................\ETESTER.fit.summary
.................\ETESTER.flow.rpt
.................\ETESTER.HIF
.................\ETESTER.map.eqn
.................\ETESTER.map.rpt
.................\ETESTER.map.summary
.................\ETESTER.PIN
.................\ETESTER.QPF
.................\ETESTER.QSF
.................\ETESTER.QWS
.................\ETESTER.SOF
.................\ETESTER.tan.summary
.................\ETESTER.VHD
.................\ETESTER_assignment_defaults.qdf
.................\TEST.VHD
.................\cmp_state.ini
.................\ETESTER.asm.rpt
.................\ETESTER.CDF
.................\ETESTER.done
.................\ETESTER.fit.eqn
.................\ETESTER.fit.rpt
.................\ETESTER.fit.summary
.................\ETESTER.flow.rpt
.................\ETESTER.HIF
.................\ETESTER.map.eqn
.................\ETESTER.map.rpt
.................\ETESTER.map.summary
.................\ETESTER.PIN
.................\ETESTER.QPF
.................\ETESTER.QSF
.................\ETESTER.QWS
.................\ETESTER.SOF
.................\ETESTER.tan.summary
.................\ETESTER.VHD
.................\ETESTER_assignment_defaults.qdf
.................\TEST.VHD