文件名称:chap8
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《Verilog HDL 程序设计教程》5-"Verilog HDL Design Guide" 5
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下载文件列表
chap8
.....\add8_tp.v
.....\carry_udp.v
.....\carry_udpx1.v
.....\carry_udpx2.v
.....\count8_tp.v
.....\delay.v
.....\dff.v
.....\dff_udp.v
.....\latch.v
.....\mult_tp.v
.....\mux31.v
.....\mux_tp.v
.....\random_tp.v
.....\rom.v
.....\test1.v
.....\test2.v
.....\time_dif.v
.....\add8_tp.v
.....\carry_udp.v
.....\carry_udpx1.v
.....\carry_udpx2.v
.....\count8_tp.v
.....\delay.v
.....\dff.v
.....\dff_udp.v
.....\latch.v
.....\mult_tp.v
.....\mux31.v
.....\mux_tp.v
.....\random_tp.v
.....\rom.v
.....\test1.v
.....\test2.v
.....\time_dif.v