文件名称:Xilinx_8
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Xilinx ISE
官方源代码盘第八章-Xilinx ISE official source was the eighth chapter
官方源代码盘第八章-Xilinx ISE official source was the eighth chapter
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压缩包 : 57578863xilinx_8.rar 列表 Xilinx_8 Xilinx_8\Example-8-1 Xilinx_8\Example-8-1\Modular_Design Xilinx_8\Example-8-1\Modular_Design\Imp_modules Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c Xilinx_8\Example-8-1\Modular_Design\Imp_top Xilinx_8\Example-8-1\Modular_Design\PIMs Xilinx_8\Example-8-1\Modular_Design\PIMs\module_a Xilinx_8\Example-8-1\Modular_Design\PIMs\module_b Xilinx_8\Example-8-1\Modular_Design\PIMs\module_c Xilinx_8\Example-8-1\Modular_Design\syn_modules Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_a Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_a\rev_1 Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_b Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_b\XST_module_b Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_b\XST_module_b\__projnav Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c\chips Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c\chips\module_c Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c\chips\module_c-Optimized Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c\files Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c\workdirs Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_c\FE_module_c\workdirs\WORK Xilinx_8\Example-8-1\Modular_Design\syn_top Xilinx_8\Example-8-1\Modular_Design\syn_top\rev_1 Xilinx_8\Example-8-1\source Xilinx_8\Example-8-1\source\vhdl Xilinx_8\Example-8-1\source\vlog Xilinx_8\Example-8-2 Xilinx_8\Example-8-2\Guide_files Xilinx_8\Example-8-2\Incremental_design Xilinx_8\Example-8-2\Incremental_design\Incremental_demo Xilinx_8\Example-8-2\Incremental_design\Incremental_demo\_ngo Xilinx_8\Example-8-2\Incremental_design\Incremental_demo\__projnav Xilinx_8\Example-8-2\source Xilinx_8\Example-8-2\source\vhdl Xilinx_8\Example-8-2\source\vlog Xilinx_8\Example-8-2\synplify_syn Xilinx_8\Example-8-2\synplify_syn\rev_1 Xilinx_8\Example-8-2\synplify_syn\rev_1\module_a Xilinx_8\Example-8-2\synplify_syn\rev_1\module_b Xilinx_8\Example-8-2\synplify_syn\rev_1\module_c Xilinx_8\Example-8-2\synplify_syn\rev_1\syntmp Xilinx_8\Example-8-2\synplify_syn\rev_1\top Xilinx_8\Example-8-2\Xilinx Xapp164 Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\module_a.cel Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\module_a.edf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\module_a.ngo Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\module_a.ucf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\netlist.lst Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.bld Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.mrp Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.ngd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.ngm Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.ngo Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top.pcf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_ngdbuild.nav Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_routed.dly Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_routed.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_routed.pad Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_routed.par Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_routed.twr Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_a\top_routed.xpi Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\module_b.ngc Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\module_b.ucf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\netlist.lst Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.bld Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.mrp Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.ngd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.ngm Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.ngo Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top.pcf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_ngdbuild.nav Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_routed.dly Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_routed.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_routed.pad Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_routed.par Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_routed.twr Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_b\top_routed.xpi Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\module_c.edf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\module_c.ngo Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\module_c.ucf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\netlist.lst Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.bld Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.mrp Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.ngd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.ngm Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.ngo Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top.pcf Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_ngdbuild.nav Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_routed.dly Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_routed.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_routed.pad Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_routed.par Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_routed.twr Xilinx_8\Example-8-1\Modular_Design\Imp_modules\module_c\top_routed.xpi Xilinx_8\Example-8-1\Modular_Design\Imp_top\netlist.lst Xilinx_8\Example-8-1\Modular_Design\Imp_top\ngd2ver.log Xilinx_8\Example-8-1\Modular_Design\Imp_top\ngd2vhdl.log Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.alf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.bld Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.cel Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.edf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.fnf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.mrp Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.nga Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.ngd Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.ngm Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.ngo Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.pcf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.sdf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.ucf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.v Xilinx_8\Example-8-1\Modular_Design\Imp_top\top.vhd Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_constraints.ucf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_ngdbuild.nav Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.dly Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.grf Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.ncd Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.pad Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.par Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.twr Xilinx_8\Example-8-1\Modular_Design\Imp_top\top_routed.xpi Xilinx_8\Example-8-1\Modular_Design\Imp_top\_fplan.ucf Xilinx_8\Example-8-1\Modular_Design\PIMs\module_a\module_a.ncd Xilinx_8\Example-8-1\Modular_Design\PIMs\module_a\module_a.ngc Xilinx_8\Example-8-1\Modular_Design\PIMs\module_a\module_a.ngm Xilinx_8\Example-8-1\Modular_Design\PIMs\module_a\top.ngc Xilinx_8\Example-8-1\Modular_Design\PIMs\module_b\module_b.ncd Xilinx_8\Example-8-1\Modular_Design\PIMs\module_b\module_b.ngc Xilinx_8\Example-8-1\Modular_Design\PIMs\module_b\module_b.ngm Xilinx_8\Example-8-1\Modular_Design\PIMs\module_b\top.ngc Xilinx_8\Example-8-1\Modular_Design\PIMs\module_c\module_c.ncd Xilinx_8\Example-8-1\Modular_Design\PIMs\module_c\module_c.ngc Xilinx_8\Example-8-1\Modular_Design\PIMs\module_c\module_c.ngm Xilinx_8\Example-8-1\Modular_Design\PIMs\module_c\top.ngc Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_a\module_a.v Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_a\rev_1\module_a.edf Xilinx_8\Example-8-1\Modular_Design\syn_modules\module_a\rev_1\module_a.fse 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