文件名称:7SegClock_HLD3

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [Text]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 233kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 王*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助-and ideally xinlinx 7 of the code led display program, and I hope to help you
相关搜索: FPGA

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下载文件列表

7SegClock_HLD3

..............\7SegClockForHLD3(20040911)(END)

..............\...............................\7segforhld3.dhp

..............\...............................\7segforhld3.npl

..............\...............................\automake.log

..............\...............................\bitgen.ut

..............\...............................\clock.bgn

..............\...............................\clock.bit

..............\...............................\clock.bld

..............\...............................\clock.cmd_log

..............\...............................\clock.drc

..............\...............................\clock.lso

..............\...............................\clock.mrp

..............\...............................\clock.nc1

..............\...............................\clock.ncd

..............\...............................\clock.ngc

..............\...............................\clock.ngd

..............\...............................\clock.ngm

..............\...............................\clock.ngr

..............\...............................\clock.pad

..............\...............................\clock.pad_txt

..............\...............................\clock.par

..............\...............................\clock.pcf

..............\...............................\clock.placed_ncd_tracker

..............\...............................\clock.prj

..............\...............................\clock.routed_ncd_tracker

..............\...............................\clock.stx

..............\...............................\clock.syr

..............\...............................\clock.twr

..............\...............................\clock.twx

..............\...............................\clock.ut

..............\...............................\clock.xpi

..............\...............................\clock_last_par.ncd

..............\...............................\clock_map.ncd

..............\...............................\clock_map.ngm

..............\...............................\clock_pad.csv

..............\...............................\clock_pad.txt

..............\...............................\top.ucf

..............\...............................\top.ucf.untf

..............\...............................\top.vhd

..............\...............................\ucf.ucf

..............\...............................\untitled.cdf

..............\...............................\xst

..............\...............................\...\work

..............\...............................\...\....\hdllib.ref

..............\...............................\...\....\hdpdeps.ref

..............\...............................\...\....\sub00

..............\...............................\...\....\.....\vhpl00.vho

..............\...............................\...\....\.....\vhpl01.vho

..............\...............................\_impact.cmd

..............\...............................\_impact.log

..............\...............................\_ngo

..............\...............................\....\netlist.lst

..............\...............................\__projnav

..............\...............................\.........\7segforhld3.gfl

..............\...............................\.........\7segforhld3_flowplus.gfl

..............\...............................\.........\bitgen.rsp

..............\...............................\.........\clock.xst

..............\...............................\.........\clock_ncdTOut_tcl.rsp

..............\...............................\.........\coregen.rsp

..............\...............................\.........\ednTOngd_tcl.rsp

..............\...............................\.........\map.log

..............\...............................\.........\nc1TOncd_tcl.rsp

..............\...............................\.........\par.log

..............\...............................\.........\posttrc.log

..............\...............................\.........\runXst_tcl.rsp

..............\...............................\.........\tozp_tcl.rsp

.........

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