文件名称:masterspiverilog
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spi总线控制器的fpga实现 verilog源代码及测试
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 43680543masterspiverilog.rar 列表 SimpleSpi\Bench\spi_slave_model.v SimpleSpi\Bench\tst_bench_top.v SimpleSpi\Bench\wb_master_model.v SimpleSpi\doc\simple_spi.doc SimpleSpi\doc\simple_spi.pdf SimpleSpi\Rtl\fifo4.v SimpleSpi\Rtl\simple_spi_top.v SimpleSpi\sim\bin\Makefile.1;content-type=text%2Fplain.txt SimpleSpi\sim\run\Makefile.1;content-type=text%2Fplain.txt SimpleSpi\sim\run\ncsim.log SimpleSpi\sim\run\ncvlog.log SimpleSpi\sim\run\simvision.sv.txt SimpleSpi\sim\run\stdout.log SimpleSpi\sim\run\waves.do.txt SimpleSpi\sim\bin SimpleSpi\sim\run SimpleSpi\Bench SimpleSpi\doc SimpleSpi\Rtl SimpleSpi\sim SimpleSpi