文件名称:source

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  • 其他小程序
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  • 上传时间:
  • 2017-12-19
  • 文件大小:
  • 31.09mb
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  • 0次
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  • YUY***
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编程verilog 适用于FPGA开发 适合初学者 极好极好极好(verilog hdl fpga eg01)
相关搜索: EGO1

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
lab1\counter.v 1114 2017-07-18
lab1\flash_led_ctl.v 1078 2017-07-18
lab1\flash_led_top.v 920 2017-07-18
lab1\sim\Flash_led_top_tb.v 1006 2017-07-18
lab1\xdc\flash_led_top.xdc 1477 2017-07-18
lab2\count_down.v 2209 2016-10-24
lab2\push_detect.v 1204 2016-10-24
lab2\show_who.v 1240 2016-10-24
lab2\sim\Smart_responder_tb.v 821 2017-01-05
lab2\Smart_responder.v 1096 2017-01-05
lab2\Smart_responder.xdc 1442 2016-10-24
lab3\dive_clk.v 1589 2016-11-15
lab3\divo_clk.v 2915 2016-11-15
lab3\div_clk.v 1353 2017-07-11
lab3\sim\sim_div.v 398 2016-11-15
lab3\xdc\IO.xdc 1379 2016-11-15
lab4\coe\filter_data.coe 4464 2016-11-15
lab4\FIR_count.v 303 2016-11-15
lab4\FIR_filter.v 1784 2016-11-15
lab4\FIR_top.v 411 2016-11-15
lab4\Matlab\mylowerfilter.m 629 2016-11-15
lab4\Matlab\result.m 151 2016-11-15
lab4\Matlab\signal.m 325 2016-11-15
lab4\multip.v 940 2016-11-15
lab4\sim\FIR_tb.v 252 2016-11-15
lab5\APP\serial_port_utility_latest.exe 7447240 2016-05-18
lab5\btn_debounce.v 791 2016-11-15
lab5\code_ctl.v 1313 2016-11-15
lab5\data_show.v 1169 2016-11-15
lab5\delay_10ms.v 939 2016-11-15
lab5\H2L_detect.v 326 2016-11-15
lab5\input_signal_processing.v 1424 2016-11-15
lab5\L2H_detect.v 326 2016-11-15
lab5\meta_harden.v 405 2016-11-15
lab5\number_encode.v 1918 2016-11-15
lab5\out_ctl.v 304 2016-11-15
lab5\reverse_detect.v 345 2016-11-15
lab5\rx_band_gen.v 883 2016-11-15
lab5\rx_ctl.v 2082 2016-11-15
lab5\rx_top.v 762 2016-11-15
lab5\scan_data.v 1497 2016-11-15
lab5\sim\uart_top_tb.v 2755 2016-11-15
lab5\tx_band_gen.v 843 2016-11-15
lab5\tx_ctl.v 2016 2016-11-15
lab5\tx_top.v 660 2016-11-15
lab5\uart_demo.v 1626 2016-11-15
lab5\uart_top.v 2289 2016-12-12
lab5\xdc\uart.xdc 3157 2016-12-12
lab6\coe\elements.jpg 6520 2016-11-15
lab6\coe\test7.coe 53274 2016-11-15
lab6\sources\debounce.v 276 2016-11-15
lab6\sources\top_flyinglogo.v 5763 2016-11-15
lab6\sources\vga_timing.v 1765 2016-11-15
lab6\xdc\display_vga.xdc 1704 2016-11-15
lab7\APP\EGo1_BT_Tool.apk 77806 2017-01-10
lab7\bt_uart.v 10352 2017-07-10
lab7\clk_div.v 2735 2016-11-15
lab7\clk_gen.v 3466 2016-11-15
lab7\clogb2.txt 414 2016-11-15
lab7\cmd_parse.v 9279 2016-11-15
lab7\debouncer.v 3307 2016-11-15
lab7\lb_ctl.v 3085 2016-11-15
lab7\meta_harden.v 1978 2016-11-15
lab7\reset_bridge.v 2324 2016-11-15
lab7\resp_gen.v 8752 2016-11-15
lab7\rst_gen.v 2747 2016-11-15
lab7\seg7decimal.v 2584 2016-11-15
lab7\to_bcd.v 5778 2016-11-15
lab7\uart_baud_gen.v 4450 2016-11-15
lab7\uart_rx.v 2333 2016-11-15
lab7\uart_rx_ctl.v 8277 2016-11-15
lab7\uart_tx.v 3135 2016-11-15
lab7\uart_tx_ctl.v 8159 2016-11-15
lab7\xdc\bt_uart_EGo.xdc 6574 2017-01-10
lab8\constrs_1\new\MB.xdc 1258 2017-07-10
lab8\helloworld.c 5086 2017-07-11
lab8\sources_1\bd\System\hdl\System.hwdef 30412 2017-07-10
lab8\sources_1\bd\System\hdl\System.v 69455 2017-07-10
lab8\sources_1\bd\System\hdl\System_wrapper.v 958 2017-07-10
lab8\sources_1\bd\System\hw_handoff\System.hwh 212623 2017-07-10
lab8\sources_1\bd\System\hw_handoff\System_bd.tcl 15169 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\sim\System_axi_gpio_0_0.vhd 8808 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\synth\System_axi_gpio_0_0.vhd 9702 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0.dcp 37689 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0.xci 15561 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0.xdc 2175 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0.xml 101488 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0_board.xdc 60 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0_ooc.xdc 2930 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0_sim_netlist.v 45302 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0_sim_netlist.vhdl 51498 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0_stub.v 2282 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_gpio_0_0\System_axi_gpio_0_0_stub.vhdl 2395 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\sim\System_axi_uartlite_0_0.vhd 8180 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\synth\System_axi_uartlite_0_0.vhd 8965 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\System_axi_uartlite_0_0.dcp 67981 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\System_axi_uartlite_0_0.xci 13977 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\System_axi_uartlite_0_0.xdc 2224 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\System_axi_uartlite_0_0.xml 84680 2017-07-10
lab8\sources_1\bd\System\ip\System_axi_uartlite_0_0\System_axi_uartlite_0_0_board.xdc 60 2017-07-10

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