文件名称:prj_ex_13
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用verilog实现数字滤波器的功能,基于quatursii平台。内含源代码(With Verilog digital filter function, based on the quatursii platform. Contain source code)
相关搜索： verilog写数字滤波器
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下载文件列表
sim\altera_lib\220model.v
sim\altera_lib\altera_mf.v
sim\ex_dds.cr.mti
sim\ex_dds.mpf
sim\run.do
sim\sp_ram_256x8.mif
sim\sp_ram_256x8.ver
sim\tb_ex_dds.v
sim\vsim.wlf
sim\work\@_opt\_lib.qdb
sim\work\@_opt\_lib.qdx
sim\work\@_opt\_lib1_0.qdb
sim\work\@_opt\_lib1_0.qpg
sim\work\@_opt\_lib2_0.qdb
sim\work\@_opt\_lib2_0.qdx
sim\work\@_opt\_lib2_0.qpg
sim\work\@_opt\_lib3_0.qdb
sim\work\@_opt\_lib3_0.qdx
sim\work\@_opt\_lib3_0.qpg
sim\work\_info
sim\work\_lib.qdb
sim\work\_lib1_11.qdb
sim\work\_lib1_11.qpg
sim\work\_lib1_12.qdb
sim\work\_lib1_12.qpg
sim\work\_vmake
design\ex_dds-org.v
design\ex_dds.v
document\DDS框图.pdf
document\DDS框图.vsdx
document\spec.txt
ex_13\design\ex_dds.v
ex_13\document\DDS框图.pdf
ex_13\document\DDS框图.vsdx
ex_13\document\spec.txt
ex_13\matlab_sim\gen_sin_wave.m
ex_13\matlab_sim\sp_ram_256x8.mif
ex_13\quartus_prj\db\ex_dds.db_info
ex_13\quartus_prj\db\ex_dds.ipinfo
ex_13\quartus_prj\db\ex_dds.sld_design_entry.sci
ex_13\quartus_prj\ex_dds.qpf
ex_13\quartus_prj\ex_dds.qsf
ex_13\quartus_prj\ex_dds.qws
ex_13\quartus_prj\ipcore_dir\ex_dds.mif
ex_13\quartus_prj\ipcore_dir\greybox_tmp\cbx_args.txt
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8.mif
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8.qip
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8.v
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8_inst.v
ex_13\sim\altera_lib\altera_mf.v
ex_13\sim\ex_dds.cr.mti
ex_13\sim\ex_dds.mpf
ex_13\sim\run.do
ex_13\sim\sp_ram_256x8.mif
ex_13\sim\sp_ram_256x8.ver
ex_13\sim\tb_ex_dds.v
ex_13\sim\vsim.wlf
ex_13\sim\work\@_opt\_lib.qdb
ex_13\sim\work\@_opt\_lib.qdx
ex_13\sim\work\@_opt\_lib1_0.qdb
ex_13\sim\work\@_opt\_lib1_0.qpg
ex_13\sim\work\@_opt\_lib2_0.qdb
ex_13\sim\work\@_opt\_lib2_0.qdx
ex_13\sim\work\@_opt\_lib2_0.qpg
ex_13\sim\work\@_opt\_lib3_0.qdb
ex_13\sim\work\@_opt\_lib3_0.qdx
ex_13\sim\work\@_opt\_lib3_0.qpg
ex_13\sim\work\_info
ex_13\sim\work\_lib.qdb
ex_13\sim\work\_lib1_0.qdb
ex_13\sim\work\_lib1_0.qpg
ex_13\sim\work\_vmake
matlab_sim\gen_sin_wave.m
matlab_sim\mixer.m
matlab_sim\sp_ram_256x8.mif
quartus_prj\db\ex_dds.db_info
quartus_prj\db\ex_dds.ipinfo
quartus_prj\db\ex_dds.sld_design_entry.sci
quartus_prj\ex_dds.qpf
quartus_prj\ex_dds.qsf
quartus_prj\ex_dds.qws
quartus_prj\ipcore_dir\ex_dds.mif
quartus_prj\ipcore_dir\greybox_tmp\cbx_args.txt
quartus_prj\ipcore_dir\mult_8x8_l0.qip
quartus_prj\ipcore_dir\mult_8x8_l0.v
quartus_prj\ipcore_dir\mult_8x8_l0_inst.v
quartus_prj\ipcore_dir\sp_ram_256x8.mif
quartus_prj\ipcore_dir\sp_ram_256x8.qip
quartus_prj\ipcore_dir\sp_ram_256x8.v
quartus_prj\ipcore_dir\sp_ram_256x8_inst.v
ex_13\quartus_prj\ipcore_dir\greybox_tmp
ex_13\sim\work\@_opt
sim\work\@_opt
ex_13\quartus_prj\db
ex_13\quartus_prj\ipcore_dir
ex_13\sim\altera_lib
ex_13\sim\work
quartus_prj\ipcore_dir\greybox_tmp
sim\altera_lib
sim\work
sim\altera_lib\altera_mf.v
sim\ex_dds.cr.mti
sim\ex_dds.mpf
sim\run.do
sim\sp_ram_256x8.mif
sim\sp_ram_256x8.ver
sim\tb_ex_dds.v
sim\vsim.wlf
sim\work\@_opt\_lib.qdb
sim\work\@_opt\_lib.qdx
sim\work\@_opt\_lib1_0.qdb
sim\work\@_opt\_lib1_0.qpg
sim\work\@_opt\_lib2_0.qdb
sim\work\@_opt\_lib2_0.qdx
sim\work\@_opt\_lib2_0.qpg
sim\work\@_opt\_lib3_0.qdb
sim\work\@_opt\_lib3_0.qdx
sim\work\@_opt\_lib3_0.qpg
sim\work\_info
sim\work\_lib.qdb
sim\work\_lib1_11.qdb
sim\work\_lib1_11.qpg
sim\work\_lib1_12.qdb
sim\work\_lib1_12.qpg
sim\work\_vmake
design\ex_dds-org.v
design\ex_dds.v
document\DDS框图.pdf
document\DDS框图.vsdx
document\spec.txt
ex_13\design\ex_dds.v
ex_13\document\DDS框图.pdf
ex_13\document\DDS框图.vsdx
ex_13\document\spec.txt
ex_13\matlab_sim\gen_sin_wave.m
ex_13\matlab_sim\sp_ram_256x8.mif
ex_13\quartus_prj\db\ex_dds.db_info
ex_13\quartus_prj\db\ex_dds.ipinfo
ex_13\quartus_prj\db\ex_dds.sld_design_entry.sci
ex_13\quartus_prj\ex_dds.qpf
ex_13\quartus_prj\ex_dds.qsf
ex_13\quartus_prj\ex_dds.qws
ex_13\quartus_prj\ipcore_dir\ex_dds.mif
ex_13\quartus_prj\ipcore_dir\greybox_tmp\cbx_args.txt
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8.mif
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8.qip
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8.v
ex_13\quartus_prj\ipcore_dir\sp_ram_256x8_inst.v
ex_13\sim\altera_lib\altera_mf.v
ex_13\sim\ex_dds.cr.mti
ex_13\sim\ex_dds.mpf
ex_13\sim\run.do
ex_13\sim\sp_ram_256x8.mif
ex_13\sim\sp_ram_256x8.ver
ex_13\sim\tb_ex_dds.v
ex_13\sim\vsim.wlf
ex_13\sim\work\@_opt\_lib.qdb
ex_13\sim\work\@_opt\_lib.qdx
ex_13\sim\work\@_opt\_lib1_0.qdb
ex_13\sim\work\@_opt\_lib1_0.qpg
ex_13\sim\work\@_opt\_lib2_0.qdb
ex_13\sim\work\@_opt\_lib2_0.qdx
ex_13\sim\work\@_opt\_lib2_0.qpg
ex_13\sim\work\@_opt\_lib3_0.qdb
ex_13\sim\work\@_opt\_lib3_0.qdx
ex_13\sim\work\@_opt\_lib3_0.qpg
ex_13\sim\work\_info
ex_13\sim\work\_lib.qdb
ex_13\sim\work\_lib1_0.qdb
ex_13\sim\work\_lib1_0.qpg
ex_13\sim\work\_vmake
matlab_sim\gen_sin_wave.m
matlab_sim\mixer.m
matlab_sim\sp_ram_256x8.mif
quartus_prj\db\ex_dds.db_info
quartus_prj\db\ex_dds.ipinfo
quartus_prj\db\ex_dds.sld_design_entry.sci
quartus_prj\ex_dds.qpf
quartus_prj\ex_dds.qsf
quartus_prj\ex_dds.qws
quartus_prj\ipcore_dir\ex_dds.mif
quartus_prj\ipcore_dir\greybox_tmp\cbx_args.txt
quartus_prj\ipcore_dir\mult_8x8_l0.qip
quartus_prj\ipcore_dir\mult_8x8_l0.v
quartus_prj\ipcore_dir\mult_8x8_l0_inst.v
quartus_prj\ipcore_dir\sp_ram_256x8.mif
quartus_prj\ipcore_dir\sp_ram_256x8.qip
quartus_prj\ipcore_dir\sp_ram_256x8.v
quartus_prj\ipcore_dir\sp_ram_256x8_inst.v
ex_13\quartus_prj\ipcore_dir\greybox_tmp
ex_13\sim\work\@_opt
sim\work\@_opt
ex_13\quartus_prj\db
ex_13\quartus_prj\ipcore_dir
ex_13\sim\altera_lib
ex_13\sim\work
quartus_prj\ipcore_dir\greybox_tmp
sim\altera_lib
sim\work