文件名称:VGA
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA的VGA显示程序，可以通过一个key实现多种演示模式转换-FPGA-based VGA display program, through a key to achieve a variety of demonstration mode conversion
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VGA
...\PLLJ_PLLSPE_INFO.txt
...\VGA.asm.rpt
...\VGA.cdf
...\VGA.done
...\VGA.fit.rpt
...\VGA.fit.smsg
...\VGA.fit.summary
...\VGA.flow.rpt
...\VGA.jdi
...\VGA.map.rpt
...\VGA.map.summary
...\VGA.pin
...\VGA.qpf
...\VGA.qsf
...\VGA.sof
...\VGA.sta.rpt
...\VGA.sta.summary
...\VGA.v
...\VGA.v.bak
...\db
...\..\VGA.amm.cdb
...\..\VGA.asm.qmsg
...\..\VGA.asm.rdb
...\..\VGA.asm_labs.ddb
...\..\VGA.cbx.xml
...\..\VGA.cmp.bpm
...\..\VGA.cmp.cdb
...\..\VGA.cmp.hdb
...\..\VGA.cmp.kpt
...\..\VGA.cmp.logdb
...\..\VGA.cmp.rdb
...\..\VGA.cmp_merge.kpt
...\..\VGA.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
...\..\VGA.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
...\..\VGA.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
...\..\VGA.cycloneive_io_sim_cache.45um_tt_1200mv_0c_slow.hsd
...\..\VGA.cycloneive_io_sim_cache.45um_tt_1200mv_85c_slow.hsd
...\..\VGA.db_info
...\..\VGA.fit.qmsg
...\..\VGA.hier_info
...\..\VGA.hif
...\..\VGA.idb.cdb
...\..\VGA.lpc.html
...\..\VGA.lpc.rdb
...\..\VGA.lpc.txt
...\..\VGA.map.bpm
...\..\VGA.map.cdb
...\..\VGA.map.hdb
...\..\VGA.map.kpt
...\..\VGA.map.logdb
...\..\VGA.map.qmsg
...\..\VGA.map_bb.cdb
...\..\VGA.map_bb.hdb
...\..\VGA.map_bb.logdb
...\..\VGA.pre_map.cdb
...\..\VGA.pre_map.hdb
...\..\VGA.root_partition.map.reg_db.cdb
...\..\VGA.rtlv.hdb
...\..\VGA.rtlv_sg.cdb
...\..\VGA.rtlv_sg_swap.cdb
...\..\VGA.sgdiff.cdb
...\..\VGA.sgdiff.hdb
...\..\VGA.sld_design_entry.sci
...\..\VGA.sld_design_entry_dsc.sci
...\..\VGA.smart_action.txt
...\..\VGA.sta.qmsg
...\..\VGA.sta.rdb
...\..\VGA.sta_cmp.8_slow_1200mv_85c.tdb
...\..\VGA.syn_hier_info
...\..\VGA.tis_db_list.ddb
...\..\VGA.tiscmp.fast_1200mv_0c.ddb
...\..\VGA.tiscmp.fastest_slow_1200mv_0c.ddb
...\..\VGA.tiscmp.fastest_slow_1200mv_85c.ddb
...\..\VGA.tiscmp.slow_1200mv_0c.ddb
...\..\VGA.tiscmp.slow_1200mv_85c.ddb
...\..\VGA.tmw_info
...\..\logic_util_heursitic.dat
...\..\pll_altpll.v
...\..\prev_cmp_VGA.qmsg
...\greybox_tmp
...\...........\cbx_args.txt
...\incremental_db
...\..............\README
...\..............\compiled_partitions
...\..............\...................\VGA.db_info
...\..............\...................\VGA.root_partition.cmp.cdb
...\..............\...................\VGA.root_partition.cmp.dfp
...\..............\...................\VGA.root_partition.cmp.hdb
...\..............\...................\VGA.root_partition.cmp.kpt
...\..............\...................\VGA.root_partition.cmp.logdb
...\..............\...................\VGA.root_partition.cmp.rcfdb
...\..............\...................\VGA.root_partition.map.cdb
...\..............\...................\VGA.root_partition.map.dpi
...\..............\...................\VGA.root_partition.map.hbdb.cdb
...\..............\...................\VGA.root_partition.map.hbdb.hb_info
...\..............\...................\VGA.root_partition.map.hbdb.hdb
...\..............\...................\VGA.root_partition.map.hbdb.sig
...\..............\...................\VGA.root_partition.map.hdb
...\..............\...................\VGA.root_partition.map.kpt