2_Embedded_System_Design_flow_on_Zynq\2015_2_zynq_docs_source\01_Class_Intro.pptx

.....................................\.......................\11a_Lab1_Intro.pptx

.....................................\.......................\11_Vivado_Overview.pptx

.....................................\.......................\12_Zynq_Architecture.pptx

.....................................\.......................\13a_Lab2_Intro.pptx

.....................................\.......................\13_Extending_Embedded_System_into_PL.pptx

.....................................\.......................\14a_Lab3_Intro.pptx

.....................................\.......................\14_Creating_and_Adding_Custom_IP.pptx

.....................................\.......................\21a_Lab4_Intro.pptx

.....................................\.......................\21_Software_Development_Environment.pptx

.....................................\.......................\22a_Lab5_Intro.pptx

.....................................\.......................\22_Software_Development_and_Debug.pptx

.....................................\............labdocs_pdf\lab1_Use Vivado to build an Embedded System.pdf

.....................................\.......................\lab2_Adding IP cores in PL.pdf

.....................................\.......................\lab3_Adding Custom IP to the System.pdf

.....................................\.......................\lab4_Writing Basic Software Application.pdf

.....................................\.......................\lab5_Software Writing for Timer and Debugging.pdf

.....................................\............sources\lab2\lab2.c

.....................................\...................\...3\lab3_user_logic.v

.....................................\...................\....\lab3_zed.xdc

.....................................\...................\....\lab3_zybo.xdc

.....................................\...................\....\user_logic_instantiation.txt

.....................................\...................\...4\lab4.c

.....................................\...................\....\lab4_soln.c

.....................................\...................\...5\lab5.c

.....................................\...................\....\lab5_completed.c

.....................................\readme_zedboard.docx

.....................................\2015_2_zynq_sources\lab2

.....................................\...................\lab3

.....................................\...................\lab4

.....................................\...................\lab5

.....................................\2015_2_zynq_docs_source

.....................................\2015_2_zynq_labdocs_pdf

.....................................\2015_2_zynq_sources

2_Embedded_System_Design_flow_on_Zynq