文件名称:OV7670_DDR2_VGA

  • 所属分类:
  • 视频捕捉/采集
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2017-01-18
  • 文件大小:
  • 26.54mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • j**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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在FPGA下的视频采集显示,采用纯Verilog编写,其中包括有OV7670摄像头,高速存储器DDR2,ADV芯片的VGA。-In FPGA video capture display, using pure Verilog prepared, which includes OV7670 camera, high-speed memory DDR2, ADV chip VGA.
(系统自动生成,下载前可以参看下载内容)

下载文件列表





OV7670_DDR2_VGA\ddr_interface\alt_ddr2.xml

...............\.............\alt_ddr2_phy_autodetectedpins.tcl

...............\.............\alt_ddr2_phy_summary.csv

...............\.............\ddr2_inst_phy_autodetectedpins.tcl

...............\.............\ddr2_inst_phy_summary.csv

...............\.............\ddr2_interface_inst.v

...............\.............\greybox_tmp\cbx_args.txt

...............\.............\incremental_db\compiled_partitions\top_fpga.db_info

...............\.............\..............\...................\top_fpga.root_partition.cmp.ammdb

...............\.............\..............\...................\top_fpga.root_partition.cmp.cdb

...............\.............\..............\...................\top_fpga.root_partition.cmp.dfp

...............\.............\..............\...................\top_fpga.root_partition.cmp.hdb

...............\.............\..............\...................\top_fpga.root_partition.cmp.logdb

...............\.............\..............\...................\top_fpga.root_partition.cmp.rcfdb

...............\.............\..............\...................\top_fpga.root_partition.map.cdb

...............\.............\..............\...................\top_fpga.root_partition.map.dpi

...............\.............\..............\...................\top_fpga.root_partition.map.hbdb.cdb

...............\.............\..............\...................\top_fpga.root_partition.map.hbdb.hb_info

...............\.............\..............\...................\top_fpga.root_partition.map.hbdb.hdb

...............\.............\..............\...................\top_fpga.root_partition.map.hbdb.sig

...............\.............\..............\...................\top_fpga.root_partition.map.hdb

...............\.............\..............\...................\top_fpga.root_partition.map.kpt

...............\.............\..............\README

...............\.............\NN_phy_autodetectedpins.tcl

...............\.............\NN_phy_summary.csv

...............\.............\output_files\alt_ddr2.xml

...............\.............\............\Chain1.cdf

...............\.............\............\ddr2_inst.xml

...............\.............\............\greybox_tmp\cbx_args.txt

...............\.............\............\my_pll_001.qip

...............\.............\............\rdfifo.qip

...............\.............\............\top_fpga.asm.rpt

...............\.............\............\top_fpga.cdf

...............\.............\............\top_fpga.done

...............\.............\............\top_fpga.fit.rpt

...............\.............\............\top_fpga.fit.smsg

...............\.............\............\top_fpga.fit.summary

...............\.............\............\top_fpga.flow.rpt

...............\.............\............\top_fpga.jdi

...............\.............\............\top_fpga.map.rpt

...............\.............\............\top_fpga.map.smsg

...............\.............\............\top_fpga.map.summary

...............\.............\............\top_fpga.pin

...............\.............\............\top_fpga.sof

...............\.............\............\top_fpga.sta.summary

...............\.............\PLLJ_PLLSPE_INFO.txt

...............\.............\rtl\camera_if.v

...............\.............\...\camera_if.v.bak

...............\.............\...\ddr2_interface.v

...............\.............\...\ddr2_interface.v.bak

...............\.............\...\greybox_tmp\cbx_args.txt

...............\.............\...\I2C_AV_Config.v

...............\.............\...\I2C_Controller.v

...............\.............\...\I2C_OV7670_Config.v

...............\.............\...\ip\ddr2\altmemphy-library\auk_ddr_hp_controller.ocp

...............\.............\...\..\....\alt_ddr2.bsf

...............\.............\...\..\....\alt_ddr2.html

...............\.............\...\..\....\alt_ddr2.ppf

...............\.............\...\..\....\alt_ddr2.qip

...............\.............\...\..\....\alt_ddr2.v

...............\.............\...\..\....\alt_ddr2_advisor.ipa

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