文件名称:DDR3_128M16bit_2Port64bit

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  • VHDL编程
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  • [PDF]
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  • 2016-09-10
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  • 1.48mb
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  • 1次
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  • 艾**
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Xilinx spartan6 DDR3驱动,编程语言Verilog,基于MCB硬核。-Xilinx spartan6 DDR3 driver based on MCB ip core,coding by verilog.
(系统自动生成,下载前可以参看下载内容)

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DDR3_128M16bit_2Port64bit

.........................\chipscope

.........................\.........\DDR_calibration.cdc

.........................\.........\DDR_chipscope.cdc

.........................\Ipcore

.........................\......\DDR3_MCB_mdl

.........................\......\............\coregen.cgp

.........................\......\............\coregen.log

.........................\......\............\create_DDR3_MCB_mdl.tcl

.........................\......\............\DDR3_MCB_mdl

.........................\......\............\DDR3_MCB_mdl.gise

.........................\......\............\DDR3_MCB_mdl.ncf

.........................\......\............\DDR3_MCB_mdl.veo

.........................\......\............\DDR3_MCB_mdl.xco

.........................\......\............\DDR3_MCB_mdl.xise

.........................\......\............\............\docs

.........................\......\............\............\....\ug388.pdf

.........................\......\............\............\....\ug416.pdf

.........................\......\............\............\example_design

.........................\......\............\............\..............\datasheet.txt

.........................\......\............\............\..............\log.txt

.........................\......\............\............\..............\mig.prj

.........................\......\............\............\..............\par

.........................\......\............\............\..............\...\create_ise.bat

.........................\......\............\............\..............\...\example_top.ucf

.........................\......\............\............\..............\...\icon_coregen.xco

.........................\......\............\............\..............\...\ila_coregen.xco

.........................\......\............\............\..............\...\ise_flow.bat

.........................\......\............\............\..............\...\ise_run.txt

.........................\......\............\............\..............\...\makeproj.bat

.........................\......\............\............\..............\...\mem_interface_top.ut

.........................\......\............\............\..............\...\readme.txt

.........................\......\............\............\..............\...\rem_files.bat

.........................\......\............\............\..............\...\set_ise_prop.tcl

.........................\......\............\............\..............\...\vio_coregen.xco

.........................\......\............\............\..............\rtl

.........................\......\............\............\..............\...\example_top.v

.........................\......\............\............\..............\...\infrastructure.v

.........................\......\............\............\..............\...\mcb_controller

.........................\......\............\............\..............\...\..............\iodrp_controller.v

.........................\......\............\............\..............\...\..............\iodrp_mcb_controller.v

.........................\......\............\............\..............\...\..............\mcb_raw_wrapper.v

.........................\......\............\............\..............\...\..............\mcb_soft_calibration.v

.........................\......\............\............\..............\...\..............\mcb_soft_calibration_top.v

.........................\......\............\............\..............\...\..............\mcb_ui_top.v

.........................\......\............\............\..............\...\memc_tb_top.v

.........................\......\............\............\..............\...\memc_wrapper.v

.........................\......\............\............\..............\...\traffic_gen

.........................\......\............\............\..............\...\...........\afifo.v

.........................\......\............\............\..............\...\...........\cmd_gen.v

.........................\......\.

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