文件名称:reg
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8-bit Shift-Left Register with Positive-Edge Clock,
Synchronous Parallel Load, Serial In, and Serial Out- 8-bit Shift-Left Register with Positive-Edge Clock,
Synchronous Parallel Load, Serial In, and Serial Out
Synchronous Parallel Load, Serial In, and Serial Out- 8-bit Shift-Left Register with Positive-Edge Clock,
Synchronous Parallel Load, Serial In, and Serial Out
(系统自动生成,下载前可以参看下载内容)
下载文件列表
reg\shift_registers_7.v
...\shift_registers_7.vhd
reg