LabCircuitos Lógicas - relatório.docx

Trabalho_Lab_Circuitos_Logicos\bookmarks.do

..............................\Disp_ay 7 seg\display-base

..............................\.............\display7segLeft

..............................\.............\Display7SegRight

..............................\dmux_1x2_arch.vhd

..............................\dmux_1x2_arch.vhd.bak

..............................\dmux_1x2_entity.vhd

..............................\dmux_1x2_entity.vhd.bak

..............................\main.vhd

..............................\Main.vhd (Case Conflict).bak

..............................\Main.vhd.bak

..............................\mux2_1_entity.vhd

..............................\mux_4x1_arch.vhd

..............................\mux_4x1_arch.vhd.bak

..............................\mux_4x1_entity.vhd

..............................\mux_4x1_entity.vhd.bak

..............................\TrabCircLogicos.cr.mti

..............................\TrabCircLogicos.mpf

..............................\vsim.wlf

..............................\work\_info

..............................\....\_lib.qdb

..............................\....\_lib1_25.qdb

..............................\....\_lib1_25.qpg

..............................\....\_lib1_25.qtl

..............................\....\_vmake

..............................\Disp_ay 7 seg

..............................\work

Trabalho_Lab_Circuitos_Logicos