文件名称:dianzibiao
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这是一个数字逻辑课程的电子表的实现，利用VHDL语言实现，初学者可以完全掌握，很有帮助。-This is the realization of the electronic timepiece a digital logic course, the use of VHDL language, beginners can fully grasp and helpful.
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下载文件列表
dianzibiao
..........\DZB
..........\DZBTOP
..........\......\db
..........\......\..\DZBTOP.asm.qmsg
..........\......\..\DZBTOP.cbx.xml
..........\......\..\DZBTOP.cmp.cdb
..........\......\..\DZBTOP.cmp.hdb
..........\......\..\DZBTOP.cmp.kpt
..........\......\..\DZBTOP.cmp.logdb
..........\......\..\DZBTOP.cmp.rdb
..........\......\..\DZBTOP.cmp.tdb
..........\......\..\DZBTOP.cmp0.ddb
..........\......\..\DZBTOP.cmp2.ddb
..........\......\..\DZBTOP.dbp
..........\......\..\DZBTOP.db_info
..........\......\..\DZBTOP.eco.cdb
..........\......\..\DZBTOP.fit.qmsg
..........\......\..\DZBTOP.hier_info
..........\......\..\DZBTOP.hif
..........\......\..\DZBTOP.map.cdb
..........\......\..\DZBTOP.map.hdb
..........\......\..\DZBTOP.map.logdb
..........\......\..\DZBTOP.map.qmsg
..........\......\..\DZBTOP.pre_map.cdb
..........\......\..\DZBTOP.pre_map.hdb
..........\......\..\DZBTOP.psp
..........\......\..\DZBTOP.rtlv.hdb
..........\......\..\DZBTOP.rtlv_sg.cdb
..........\......\..\DZBTOP.rtlv_sg_swap.cdb
..........\......\..\DZBTOP.sgdiff.cdb
..........\......\..\DZBTOP.sgdiff.hdb
..........\......\..\DZBTOP.signalprobe.cdb
..........\......\..\DZBTOP.sld_design_entry.sci
..........\......\..\DZBTOP.sld_design_entry_dsc.sci
..........\......\..\DZBTOP.smp_dump.txt
..........\......\..\DZBTOP.syn_hier_info
..........\......\..\DZBTOP.tan.qmsg
..........\......\DZB.bdf
..........\......\DZB.bsf
..........\......\DZBTOP.asm.rpt
..........\......\DZBTOP.bdf
..........\......\DZBTOP.done
..........\......\DZBTOP.dpf
..........\......\DZBTOP.fit.rpt
..........\......\DZBTOP.fit.smsg
..........\......\DZBTOP.fit.summary
..........\......\DZBTOP.flow.rpt
..........\......\DZBTOP.map.rpt
..........\......\DZBTOP.map.summary
..........\......\DZBTOP.pin
..........\......\DZBTOP.pof
..........\......\DZBTOP.qpf
..........\......\DZBTOP.qsf
..........\......\DZBTOP.qws
..........\......\DZBTOP.sof
..........\......\DZBTOP.tan.rpt
..........\......\DZBTOP.tan.summary
..........\......\XIANSHIDZB.bsf
..........\......\XIANSHIDZB.vhd
..........\...\db
..........\...\..\DZB.cbx.xml
..........\...\..\DZB.cmp.rdb
..........\...\..\DZB.dbp
..........\...\..\DZB.db_info
..........\...\..\DZB.eco.cdb
..........\...\..\DZB.eds_overflow
..........\...\..\DZB.fnsim.cdb
..........\...\..\DZB.fnsim.hdb
..........\...\..\DZB.fnsim.qmsg
..........\...\..\DZB.hier_info
..........\...\..\DZB.hif
..........\...\..\DZB.map.cdb
..........\...\..\DZB.map.hdb
..........\...\..\DZB.map.logdb
..........\...\..\DZB.map.qmsg
..........\...\..\DZB.pre_map.cdb
..........\...\..\DZB.pre_map.hdb
..........\...\..\DZB.psp
..........\...\..\DZB.pss
..........\...\..\DZB.rtlv.hdb
..........\...\..\DZB.rtlv_sg.cdb
..........\...\..\DZB.rtlv_sg_swap.cdb
..........\...\..\DZB.sgdiff.cdb
..........\...\..\DZB.sgdiff.hdb
..........\...\..\DZB.sim.hdb
..........\...\..\DZB.sim.qmsg
..........\...\..\DZB.sim.rdb
..........\...\..\DZB.sim.vwf
..........\...\..\DZB.sld_design_entry.sci
..........\...\..\DZB.sld_design_entry_dsc.sci
..........\...\..\DZB.syn_hier_info
..........\...\..\wed.zsf
..........\...\DZB.bdf
..........\...\DZB.bsf
..........\...\DZB.done
..........\...\DZB.flow.rpt
..........\...\DZB.map.rpt
..........\...\DZB.map.summary
..........\...\DZB.qpf