文件名称:iic
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通过verilog语言实现了关于IIC协议,并且通过了modelsim的功能仿真验证以及板卡之间的RTL调试。-the verilog code about IIC standard,checked by modelsim,and make ture the IIC function in RTL。
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下载文件列表
iic\iic.gise
...\iic.xise
...\.pcore_dir\coregen.cgp
...\..........\coregen.log
...\..........\create_gtx.tcl
...\..........\gtx\doc\ug769_gtwizard.pdf
...\..........\...\example_design\data_vio.ngc
...\..........\...\..............\gtx_clock_module.v
...\..........\...\..............\gtx_exdes.ucf
...\..........\...\..............\gtx_exdes.v
...\..........\...\..............\gtx_exdes.xcf
...\..........\...\..............\gtx_exdes.xdc
...\..........\...\..............\gtx_exdes_synplify.sdc
...\..........\...\..............\gtx_gt_frame_check.v
...\..........\...\..............\gtx_gt_frame_gen.v
...\..........\...\..............\gtx_gt_usrclk_source.v
...\..........\...\..............\gtx_rx_sync.v
...\..........\...\..............\gtx_tx_sync_auto.v
...\..........\...\..............\gtx_tx_sync_drp.v
...\..........\...\..............\gtx_tx_sync_manual.v
...\..........\...\..............\gt_attributes.ucf
...\..........\...\..............\gt_rom_init_rx.dat
...\..........\...\..............\gt_rom_init_tx.dat
...\..........\...\..............\icon.ngc
...\..........\...\..............\ila.ngc
...\..........\...\gtwizard_v1_5_readme.txt
...\..........\...\gtx.pf
...\..........\...\implement\chipscope_project.cpj
...\..........\...\.........\implement.bat
...\..........\...\.........\implement.sh
...\..........\...\.........\implement_synplify.bat
...\..........\...\.........\implement_synplify.sh
...\..........\...\.........\planAhead_ise.bat
...\..........\...\.........\planAhead_ise.sh
...\..........\...\.........\planAhead_ise.tcl
...\..........\...\.........\planAhead_rdn.bat
...\..........\...\.........\planAhead_rdn.sh
...\..........\...\.........\planAhead_rdn.tcl
...\..........\...\.........\synplify.prj
...\..........\...\.........\xst.prj
...\..........\...\.........\xst.scr
...\..........\...\simulation\functional\gt_rom_init_rx.dat
...\..........\...\..........\..........\gt_rom_init_tx.dat
...\..........\...\..........\..........\simulate_isim.bat
...\..........\...\..........\..........\simulate_isim.sh
...\..........\...\..........\..........\simulate_mti.bat
...\..........\...\..........\..........\simulate_mti.do
...\..........\...\..........\..........\simulate_mti.sh
...\..........\...\..........\..........\simulate_ncsim.bat
...\..........\...\..........\..........\simulate_ncsim.sh
...\..........\...\..........\..........\simulate_vcs.sh
...\..........\...\..........\..........\ucli_commands.key
...\..........\...\..........\..........\vcs_session.tcl
...\..........\...\..........\..........\wave_isim.tcl
...\..........\...\..........\..........\wave_mti.do
...\..........\...\..........\..........\wave_ncsim.sv
...\..........\...\..........\gtx_tb.v
...\..........\...\..........\gtx_tb_imp.v
...\..........\...\..........\timing\simulate_mti.bat
...\..........\...\..........\......\simulate_mti.do
...\..........\...\..........\......\simulate_mti.sh
...\..........\gtx.gise
...\..........\gtx.v
...\..........\gtx.veo
...\..........\gtx.xco
...\..........\gtx.xdc
...\..........\gtx.xise
...\..........\gtx_flist.txt
...\..........\gtx_gt.v
...\..........\gtx_readme.txt
...\..........\gtx_xmdf.tcl
...\..........\tmp\_xmsgs\pn_parser.xmsgs
...\..........\_xmsgs\cg.xmsgs
...\..........\......\pn_parser.xmsgs
...\.seconfig\iic.projectmgr
...\_xmsgs\pn_parser.xmsgs
...\ipcore_dir\gtx\simulation\functional
...\..........\...\..........\timing
...\..........\...\doc
...\..........\...\example_design
...\..........\...\implement
...\..........\...\simulation
...\..........\tmp\_cg
...\..........\...\_xmsgs
...\..........\gtx
...\..........\tmp
...\..........\_xmsgs
...\ipcore_dir
...\iseconfig
...\_xmsgs
iic