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This file is the VHDL code for controlling the stepping motor. The clock driving the stepping motor driver module. through signal it can control the direction of the stepping motor.-This file is the VHDL code for controlling the stepping motor. The clock driving the stepping motor driver module. through signal it can control the direction of the stepping motor.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
db\.cmp.kpt
..\logic_util_heursitic.dat
..\prev_cmp_test.asm.qmsg
..\prev_cmp_test.eda.qmsg
..\prev_cmp_test.fit.qmsg
..\prev_cmp_test.map.qmsg
..\prev_cmp_test.qmsg
..\prev_cmp_test.tan.qmsg
..\test.asm.qmsg
..\test.asm.rdb
..\test.asm_labs.ddb
..\test.cbx.xml
..\test.cmp.cdb
..\test.cmp.hdb
..\test.cmp.idb
..\test.cmp.logdb
..\test.cmp.rdb
..\test.cmp0.ddb
..\test.db_info
..\test.eda.qmsg
..\test.fit.qmsg
..\test.hier_info
..\test.hif
..\test.ipinfo
..\test.lpc.html
..\test.lpc.rdb
..\test.lpc.txt
..\test.map.cdb
..\test.map.hdb
..\test.map.logdb
..\test.map.qmsg
..\test.map.rdb
..\test.pplq.rdb
..\test.pre_map.hdb
..\test.pti_db_list.ddb
..\test.root_partition.map.reg_db.cdb
..\test.routing.rdb
..\test.rtlv.hdb
..\test.rtlv_sg.cdb
..\test.rtlv_sg_swap.cdb
..\test.sgdiff.cdb
..\test.sgdiff.hdb
..\test.sld_design_entry.sci
..\test.sld_design_entry_dsc.sci
..\test.smart_action.txt
..\test.sta.qmsg
..\test.sta.rdb
..\test.sta_cmp.5_slow.tdb
..\test.tis_db_list.ddb
..\test.vpr.ammdb
..\test_global_asgn_op.abo
incremental_db\compiled_partitions\test.db_info
..............\...................\test.root_partition.map.kpt
..............\README
output_files\test.asm.rpt
............\test.cdf
............\test.done
............\test.eda.rpt
............\test.fit.rpt
............\test.fit.smsg
............\test.fit.summary
............\test.flow.rpt
............\test.jdi
............\test.map.rpt
............\test.map.summary
............\test.pin
............\test.pof
............\test.sta.rpt
............\test.sta.summary
............\test.tan.rpt
............\test.tan.summary
simulation\modelsim\test.sft
..........\........\test.vho
..........\........\test_modelsim.xrf
..........\........\test_vhd.sdo
test.dpf
test.qpf
test.qsf
test.qws
test.vhd
test.vhd.bak
test_assignment_defaults.qdf