文件名称:correct
- 所属分类:
- 其他嵌入式/单片机内容
- 资源属性:
- [VHDL] [源码]
- 上传时间:
- 2015-06-01
- 文件大小:
- 2kb
- 下载次数:
- 0次
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- 相关连接:
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通过计算出 S1 S2 S3来完成对信息位的查错和纠错并且在每传完512位信息位和384位后检测收到的数据是不是0000,若是0000的话表示接收双方依旧同步
否则将 asyn_flag置为高电平表示不同步-By calculating S1 S2 S3 to complete the information bits and error checking and error correction data received at 512 and 384 after the information bits per pass completion is not detected 0000, 0000 as saying that if the two sides are still receiving synchronization otherwise asyn_flag set high representation of sync
否则将 asyn_flag置为高电平表示不同步-By calculating S1 S2 S3 to complete the information bits and error checking and error correction data received at 512 and 384 after the information bits per pass completion is not detected 0000, 0000 as saying that if the two sides are still receiving synchronization otherwise asyn_flag set high representation of sync
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correct.v