文件名称:SI4432_RX_192
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA的SI4432无线透传模块的VERILOG工程，测试可用(接收端工程文件)，使用Quartus II 可以直接打开。
-FPGA-based wireless passthrough module SI4432 VERILOG engineering, testing available
-FPGA-based wireless passthrough module SI4432 VERILOG engineering, testing available
(系统自动生成,下载前可以参看下载内容)
下载文件列表
SI4432_RX_192
.............\clk_generator.v
.............\clk_generator.v.bak
.............\db
.............\..\altsyncram_0l14.tdf
.............\..\altsyncram_1l14.tdf
.............\..\altsyncram_2i14.tdf
.............\..\altsyncram_2l14.tdf
.............\..\altsyncram_2to3.tdf
.............\..\altsyncram_3l14.tdf
.............\..\altsyncram_4l14.tdf
.............\..\altsyncram_5l14.tdf
.............\..\altsyncram_6l14.tdf
.............\..\altsyncram_7l14.tdf
.............\..\altsyncram_8l14.tdf
.............\..\altsyncram_9l14.tdf
.............\..\altsyncram_mk14.tdf
.............\..\altsyncram_nk14.tdf
.............\..\altsyncram_ok14.tdf
.............\..\altsyncram_pk14.tdf
.............\..\altsyncram_qk14.tdf
.............\..\altsyncram_rk14.tdf
.............\..\altsyncram_s8v3.tdf
.............\..\altsyncram_sk14.tdf
.............\..\altsyncram_tk14.tdf
.............\..\altsyncram_uk14.tdf
.............\..\altsyncram_uvo3.tdf
.............\..\altsyncram_vk14.tdf
.............\..\cmpr_j4c.tdf
.............\..\cmpr_l4c.tdf
.............\..\cmpr_m4c.tdf
.............\..\cmpr_n4c.tdf
.............\..\cntr_4ti.tdf
.............\..\cntr_74i.tdf
.............\..\cntr_84i.tdf
.............\..\cntr_94i.tdf
.............\..\cntr_a4i.tdf
.............\..\cntr_b4i.tdf
.............\..\cntr_c4i.tdf
.............\..\cntr_cti.tdf
.............\..\cntr_d4i.tdf
.............\..\cntr_e4i.tdf
.............\..\cntr_f4i.tdf
.............\..\cntr_g4i.tdf
.............\..\cntr_h4i.tdf
.............\..\cntr_i4i.tdf
.............\..\cntr_iti.tdf
.............\..\cntr_j4i.tdf
.............\..\cntr_k4i.tdf
.............\..\cntr_l4i.tdf
.............\..\cntr_m4i.tdf
.............\..\cntr_n4i.tdf
.............\..\cntr_q2i.tdf
.............\..\cntr_t2i.tdf
.............\..\cntr_umi.tdf
.............\..\decode_9jf.tdf
.............\..\decode_nga.tdf
.............\..\logic_util_heursitic.dat
.............\..\mux_lgc.tdf
.............\..\mux_ngc.tdf
.............\..\mux_ocb.tdf
.............\..\mux_pgc.tdf
.............\..\prev_cmp_SI4432_rx.asm.qmsg
.............\..\prev_cmp_SI4432_rx.eda.qmsg
.............\..\prev_cmp_SI4432_rx.fit.qmsg
.............\..\prev_cmp_SI4432_rx.map.qmsg
.............\..\prev_cmp_SI4432_rx.qmsg
.............\..\prev_cmp_SI4432_rx.tan.qmsg
.............\..\SI4432_rx.amm.cdb
.............\..\SI4432_rx.asm.qmsg
.............\..\SI4432_rx.asm.rdb
.............\..\SI4432_rx.autoh_e4eb1.map.reg_db.cdb
.............\..\SI4432_rx.autos_3e921.map.reg_db.cdb
.............\..\SI4432_rx.cbx.xml
.............\..\SI4432_rx.cmp.bpm
.............\..\SI4432_rx.cmp.cdb
.............\..\SI4432_rx.cmp.hdb
.............\..\SI4432_rx.cmp.kpt
.............\..\SI4432_rx.cmp.logdb
.............\..\SI4432_rx.cmp.rdb
.............\..\SI4432_rx.cmp0.ddb
.............\..\SI4432_rx.cmp_merge.kpt
.............\..\SI4432_rx.db_info
.............\..\SI4432_rx.eda.qmsg
.............\..\SI4432_rx.fit.qmsg
.............\..\SI4432_rx.hier_info
.............\..\SI4432_rx.hif
.............\..\SI4432_rx.idb.cdb
.............\..\SI4432_rx.lpc.html
.............\..\SI4432_rx.lpc.rdb
.............\..\SI4432_rx.lpc.txt
.............\..\SI4432_rx.map.bpm
.............\..\SI4432_rx.map.cdb
.............\..\SI4432_rx.map.hdb
.............\..\SI4432_rx.map.kpt
.............\..\SI4432_rx.map.logdb
.............\..\SI4432_rx.map.qmsg
.............\..\SI4432_rx.map.rcfdb
.............\..\SI4432_rx.map_bb.cdb
.............\..\SI4432_rx.map_bb.hdb