文件名称:uart
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基于Libero11.3平台的带收发FIFO的UART程序-Based Libero11.3 platform with the FIFO UART transceiver program
(系统自动生成,下载前可以参看下载内容)
下载文件列表
uart\component\work\DESIGN_FIRMWARE\DESIGN_FIRMWARE.cxf
....\.........\....\...............\DESIGN_FIRMWARE.sdb
....\.........\....\.......IO\DESIGN_IO.cxf
....\.........\....\.........\DESIGN_IO.sdb
....\.........\....\uart_rx\testbench.v
....\.........\....\.......\uart_rx.cxf
....\.........\....\.......\uart_rx.sdb
....\.........\....\.......\uart_rx.v
....\.........\....\.....self\datasheet.xsl
....\.........\....\.........\testbench.v
....\.........\....\.........\uart_self.cxf
....\.........\....\.........\uart_self.sdb
....\.........\....\.........\uart_self.v
....\.........\....\.........\uart_self_DataSheet.xml
....\.........\....\.....tx\testbench.v
....\.........\....\.......\uart_tx.cxf
....\.........\....\.......\uart_tx.sdb
....\.........\....\.......\uart_tx.v
....\designer\impl1\ada03820-1.tmp
....\........\.....\detect.ide_des
....\........\.....\run_designer_tool.log
....\........\.....\run_designer_tool.tcl
....\........\.....\run_pinrpt.tcl
....\........\.....\uart_cs.dat
....\........\.....\uart_self.adb
....\........\.....\uart_self.dat
....\........\.....\...........tf\verify.log
....\........\.....\uart_self.ide_des
....\........\.....\uart_self.lok
....\........\.....\uart_self.tcl
....\........\.....\uart_self_compile_log.rpt
....\........\.....\uart_self_compile_report.txt
....\........\.....\uart_self_report_pin_byname.txt
....\........\.....\uart_self_report_pin_bynumber.txt
....\hdl\detect.v
....\...\rx_bps.v
....\...\rx_ctrl.v
....\...\tx_bps.v
....\...\tx_ctrl.v
....\simulation\modelsim.ini
....\..........\modelsim.ini.sav
....\..........\presynth\_info
....\..........\........\_lib.qdb
....\..........\........\_lib1_10.qdb
....\..........\........\_lib1_10.qpg
....\..........\........\_lib1_11.qdb
....\..........\........\_lib1_11.qpg
....\..........\........\_vmake
....\..........\run.do
....\..........\uart_presynth_simulation.log
....\..........\vsim.wlf
....\.martgen\DESIGN_FIRMWARE_work.ixf
....\........\DESIGN_IO_work.ixf
....\........\rx_fifo\rx_fifo.cxf
....\........\.......\rx_fifo.gen
....\........\.......\rx_fifo.log
....\........\.......\rx_fifo.v
....\........\rx_fifo_work.ixf
....\........\smartgen.aws
....\........\tx_fifo\tx_fifo.cxf
....\........\.......\tx_fifo.gen
....\........\.......\tx_fifo.log
....\........\.......\tx_fifo.v
....\........\tx_fifo_work.ixf
....\........\uart_rx_work.ixf
....\........\uart_self_work.ixf
....\........\uart_tx_work.ixf
....\.timulus\uart.v
....\........\uart_self.v
....\.ynthesis\.recordref_modgen
....\.........\backup\uart_self.srr
....\.........\dm\uart_self_comp.xdm
....\.........\run_options.txt
....\.........\scratchproject.prs
....\.........\.ynlog\report\uart_self_compiler_notes.txt
....\.........\......\......\uart_self_compiler_runstatus.xml
....\.........\......\......\uart_self_compiler_warnings.txt
....\.........\......\......\uart_self_fpga_mapper_area_report.xml
....\.........\......\......\uart_self_fpga_mapper_combined_clk.rpt
....\.........\......\......\uart_self_fpga_mapper_errors.txt
....\.........\......\......\uart_self_fpga_mapper_notes.txt
....\.........\......\......\uart_self_fpga_mapper_opt_report.xml
....\.........\......\......\uart_self_fpga_mapper_resourceusage.rpt
....\.........\......\......\uart_self_fpga_mapper_runstatus.xml
....\.........\......\......\uart_self_fpga_mapper_timing_report.xml
....\.........\......\......\uart_self_fpga_mapper_warnings.txt
....\.........\......\......\uart_self_premap_errors.txt
....\.........\......\......\uart_self_premap_notes.txt
....\.........\......\......\uart_self_premap_runstatus.xml
....\.........\......\......\uart_self_premap_warnings.txt
....\.........\......\uart_self_fpga_mapper.srr
....\.........\......\uart_self_fpga_mapper.srr_Min
....\.........\......\uart_self_fpga_mapper.szr
....\.........\......\uart_self_fpga_mapper.xck
....\.........\......\uart_self_premap.srr
....\.........\......\uart_self_premap.szr
....\.........\synlog.tcl
....\.........\synplify.log
....\.........\...tmp\closed.png
....\.........\......\cmdrec_compiler.log