文件名称:dig_clk

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2014-06-09
  • 文件大小:
  • 899kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 钱**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

实现vhdl数字钟 实现时分秒调时 消抖等功能

采用quartus编程实现 -digital clock
(系统自动生成,下载前可以参看下载内容)

下载文件列表





dig_clk

.......\db

.......\..\dig_clk.asm.qmsg

.......\..\dig_clk.asm.rdb

.......\..\dig_clk.asm_labs.ddb

.......\..\dig_clk.cbx.xml

.......\..\dig_clk.cmp.bpm

.......\..\dig_clk.cmp.cdb

.......\..\dig_clk.cmp.hdb

.......\..\dig_clk.cmp.idb

.......\..\dig_clk.cmp.kpt

.......\..\dig_clk.cmp.logdb

.......\..\dig_clk.cmp.rdb

.......\..\dig_clk.cmp0.ddb

.......\..\dig_clk.cmp1.ddb

.......\..\dig_clk.cmp2.ddb

.......\..\dig_clk.cmp_merge.kpt

.......\..\dig_clk.db_info

.......\..\dig_clk.eda.qmsg

.......\..\dig_clk.fit.qmsg

.......\..\dig_clk.hier_info

.......\..\dig_clk.hif

.......\..\dig_clk.ipinfo

.......\..\dig_clk.lpc.html

.......\..\dig_clk.lpc.rdb

.......\..\dig_clk.lpc.txt

.......\..\dig_clk.map.bpm

.......\..\dig_clk.map.cdb

.......\..\dig_clk.map.hdb

.......\..\dig_clk.map.kpt

.......\..\dig_clk.map.logdb

.......\..\dig_clk.map.qmsg

.......\..\dig_clk.map.rdb

.......\..\dig_clk.map_bb.cdb

.......\..\dig_clk.map_bb.hdb

.......\..\dig_clk.map_bb.logdb

.......\..\dig_clk.pre_map.cdb

.......\..\dig_clk.pre_map.hdb

.......\..\dig_clk.qns

.......\..\dig_clk.root_partition.map.reg_db.cdb

.......\..\dig_clk.routing.rdb

.......\..\dig_clk.rtlv.hdb

.......\..\dig_clk.rtlv_sg.cdb

.......\..\dig_clk.rtlv_sg_swap.cdb

.......\..\dig_clk.sas

.......\..\dig_clk.sgdiff.cdb

.......\..\dig_clk.sgdiff.hdb

.......\..\dig_clk.sim.cvwf

.......\..\dig_clk.sld_design_entry.sci

.......\..\dig_clk.sld_design_entry_dsc.sci

.......\..\dig_clk.smart_action.txt

.......\..\dig_clk.sta.qmsg

.......\..\dig_clk.sta.rdb

.......\..\dig_clk.sta_cmp.8_slow.tdb

.......\..\dig_clk.syn_hier_info

.......\..\dig_clk.tis_db_list.ddb

.......\..\dig_clk.tmw_info

.......\..\dig_clk.vpr.ammdb

.......\..\logic_util_heursitic.dat

.......\..\prev_cmp_dig_clk.asm.qmsg

.......\..\prev_cmp_dig_clk.eda.qmsg

.......\..\prev_cmp_dig_clk.fit.qmsg

.......\..\prev_cmp_dig_clk.map.qmsg

.......\..\prev_cmp_dig_clk.qmsg

.......\..\prev_cmp_dig_clk.tan.qmsg

.......\..\wed.wsf

.......\dig_clk.asm.rpt

.......\dig_clk.done

.......\dig_clk.dpf

.......\dig_clk.eda.rpt

.......\dig_clk.fit.rpt

.......\dig_clk.fit.smsg

.......\dig_clk.fit.summary

.......\dig_clk.flow.rpt

.......\dig_clk.jdi

.......\dig_clk.map.rpt

.......\dig_clk.map.summary

.......\dig_clk.pin

.......\dig_clk.pof

.......\dig_clk.qpf

.......\dig_clk.qsf

.......\dig_clk.qws

.......\dig_clk.sim.rpt

.......\dig_clk.sof

.......\dig_clk.sta.rpt

.......\dig_clk.sta.summary

.......\dig_clk.tan.rpt

.......\dig_clk.tan.summary

.......\dig_clk.vhd

.......\dig_clk.vhd.bak

.......\dig_clk.vwf

.......\dig_clk_assignment_defaults.qdf

.......\incremental_db

.......\..............\compiled_partitions

.......\..............\...................\dig_clk.db_info

.......\..............\...................\dig_clk.root_partition.cmp.ammdb

.......\..............\...................\dig_clk.root_partition.cmp.atm

.......\..............\...................\dig_clk.root_partition.cmp.cdb

.......\..............\...................\dig_clk.root_partition.cmp.dfp

.......\..............\...................\dig_clk.root_partition.cmp.hdb

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