文件名称:rs(63-45)
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用VHDL实现的RS（63,45）编码器，已经用ISE和questasim编译仿真通过。对45个信息位进行编码。-VHDL implementation of the RS (63,45) encoder has been compiled with the ISE and questasim through simulation. Of 45 information bits are encoded.
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下载文件列表
| 文件名 | 大小 | 更新时间 |
|---|---|---|
|
| ||
| rs(63 | 45) | |
| .........\RS.vhd | ||
| .........\mula_0.vhd | ||
| .........\mula_11.vhd | ||
| .........\mula_21.vhd | ||
| .........\mula_22.vhd | ||
| .........\mula_25.vhd | ||
| .........\mula_3.vhd | ||
| .........\mula_31.vhd | ||
| .........\mula_32.vhd | ||
| .........\mula_35.vhd | ||
| .........\mula_38.vhd | ||
| .........\mula_45.vhd | ||
| .........\mula_48.vhd | ||
| .........\mula_51.vhd | ||
| .........\mula_59.vhd | ||
| .........\mula_6.vhd | ||
| .........\mula_61.vhd | ||
| .........\rscode.vhd | ||
| .........\rstest.vhd |