文件名称:count16

  • 所属分类:
  • 其他小程序
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2014-04-04
  • 文件大小:
  • 312kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 盛*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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计数器,进行16位数字计数,可以精确实现其功能-Counter, 16-bit digital counter, can accurately achieve its function
(系统自动生成,下载前可以参看下载内容)

下载文件列表





count16\count16.asm.rpt

.......\count16.done

.......\count16.eda.rpt

.......\count16.fit.rpt

.......\count16.fit.smsg

.......\count16.fit.summary

.......\count16.flow.rpt

.......\count16.map.rpt

.......\count16.map.summary

.......\count16.pin

.......\count16.pof

.......\count16.qpf

.......\count16.qsf

.......\count16.sdc

.......\count16.sof

.......\count16.sta.rpt

.......\count16.sta.summary

.......\count16.v

.......\count16.v.bak

.......\count16_nativelink_simulation.rpt

.......\count16_test.v

.......\count16_test.v.bak

.......\db\count16.amm.cdb

.......\..\count16.analyze_file.qmsg

.......\..\count16.asm.qmsg

.......\..\count16.asm.rdb

.......\..\count16.cbx.xml

.......\..\count16.cmp.bpm

.......\..\count16.cmp.cdb

.......\..\count16.cmp.hdb

.......\..\count16.cmp.kpt

.......\..\count16.cmp.logdb

.......\..\count16.cmp.rdb

.......\..\count16.cmp0.ddb

.......\..\count16.cmp_merge.kpt

.......\..\count16.db_info

.......\..\count16.eda.qmsg

.......\..\count16.fit.qmsg

.......\..\count16.hier_info

.......\..\count16.hif

.......\..\count16.idb.cdb

.......\..\count16.lpc.html

.......\..\count16.lpc.rdb

.......\..\count16.lpc.txt

.......\..\count16.map.bpm

.......\..\count16.map.cdb

.......\..\count16.map.hdb

.......\..\count16.map.kpt

.......\..\count16.map.logdb

.......\..\count16.map.qmsg

.......\..\count16.map_bb.cdb

.......\..\count16.map_bb.hdb

.......\..\count16.map_bb.logdb

.......\..\count16.pre_map.cdb

.......\..\count16.pre_map.hdb

.......\..\count16.rpp.qmsg

.......\..\count16.rtlv.hdb

.......\..\count16.rtlv_sg.cdb

.......\..\count16.rtlv_sg_swap.cdb

.......\..\count16.sgate.rvd

.......\..\count16.sgate_sm.rvd

.......\..\count16.sgdiff.cdb

.......\..\count16.sgdiff.hdb

.......\..\count16.sld_design_entry.sci

.......\..\count16.sld_design_entry_dsc.sci

.......\..\count16.smart_action.txt

.......\..\count16.sta.qmsg

.......\..\count16.sta.rdb

.......\..\count16.sta_cmp.5_slow.tdb

.......\..\count16.syn_hier_info

.......\..\count16.taw.rdb

.......\..\count16.tis_db_list.ddb

.......\..\logic_util_heursitic.dat

.......\..\prev_cmp_count16.qmsg

.......\incremental_db\compiled_partitions\count16.db_info

.......\..............\...................\count16.root_partition.cmp.cdb

.......\..............\...................\count16.root_partition.cmp.dfp

.......\..............\...................\count16.root_partition.cmp.hdb

.......\..............\...................\count16.root_partition.cmp.kpt

.......\..............\...................\count16.root_partition.cmp.logdb

.......\..............\...................\count16.root_partition.cmp.rcfdb

.......\..............\...................\count16.root_partition.map.cdb

.......\..............\...................\count16.root_partition.map.dpi

.......\..............\...................\count16.root_partition.map.hbdb.cdb

.......\..............\...................\count16.root_partition.map.hbdb.hb_info

.......\..............\...................\count16.root_partition.map.hbdb.hdb

.......\..............\...................\count16.root_partition.map.hbdb.sig

.......\..............\...................\count16.root_partition.map.hdb

.......\..............\...................\count16.root_partition.map.kpt

.......\..............\README

.......\simulation\modelsim\count16.cr.mti

.......\..........\........\count16.mpf

.......\..........\........\count16.sft

.......\..........\........\count16.vo

.......\..........\........\count16.vt

.......\..........\........\count16_modelsim.xrf

.......\..........\........\count16_run_msim_gate_verilog.do

.......\..........\........\count16_run_msim_gate_verilog.do.bak

.......\..........\........\count16_run_msim_gate_verilog.do.bak1

.......\..........\........\count16_run_msim_gate_verilog.do.bak2

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