文件名称:verilog-hdl
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VHDL的各种算法算例，可供西电的大作业设计参考，是学习可编程语言的必备算例-VHDL examples of various algorithms available for Western Electric' s big job reference design is essential to learn a programming language examples
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source
......\chap10
......\......\acc.acf
......\......\acc.hif
......\......\acc.v
......\......\accn.v
......\......\add8.v
......\......\adder8.v
......\......\block1.v
......\......\block2.v
......\......\block3.v
......\......\block4.v
......\......\control.v
......\......\fsm.v
......\......\longframe1.v
......\......\longframe2.v
......\......\pipeline.v
......\......\reg8.v
......\......\resource1.v
......\......\resource2.v
......\chap11
......\......\account.v
......\......\clock.v
......\......\count10.v
......\......\fre_ctrl.v
......\......\latch_16.v
......\......\paobiao.v
......\......\sell.v
......\......\song.v
......\......\traffic.v
......\chap12
......\......\add_ahead.v
......\......\add_bx.v
......\......\add_jl.v
......\......\add_tree.v
......\......\correlator.v
......\......\crc.v
......\......\cycle.v
......\......\decoder1.v
......\......\decoder2.v
......\......\fir.v
......\......\linear.v
......\......\mult.v
......\......\mult4x4.v
......\chap3
......\.....\adder4.acf
......\.....\adder4.hif
......\.....\adder4.ndb
......\.....\adder4.v
......\.....\adder_tp.v
......\.....\aoi.v
......\.....\count4.v
......\.....\count4_tp.v
......\chap5
......\.....\adder.v
......\.....\adder16.v
......\.....\alu.v
......\.....\block.v
......\.....\buried_ff.v
......\.....\compile.v
......\.....\count.v
......\.....\count60.v
......\.....\decode4_7.v
......\.....\loop1.v
......\.....\loop2.v
......\.....\loop3.v
......\.....\mult_for.v
......\.....\mult_repeat.v
......\.....\mux21_1.v
......\.....\mux21_2.v
......\.....\mux4_1.v
......\.....\mux_casez.v
......\.....\non_block.v
......\.....\test.v
......\.....\voter7.v
......\.....\wave1.v
......\.....\wave2.v
......\chap6
......\.....\alu_tp.v
......\.....\alutask.v
......\.....\code_83.v
......\.....\count.v
......\.....\funct.v
......\.....\funct_tp.v
......\.....\paral1.v
......\.....\paral2.v
......\.....\serial1.v
......\.....\serial2.v
......\chap7
......\.....\add4_1.v
......\.....\add4_2.v
......\.....\add4_3.v
......\.....\count4.v
......\.....\full_add1.v
......\.....\full_add2.v
......\.....\full_add3.v
......\.....\full_add4.v
......\.....\full_add5.v
......\.....\half_add1.v
......\.....\half_add2.v