文件名称:CPU
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经典的CPU设计，内部有详细的资料和设计方案，与PCI8位单片机指令兼容-Classic CPU design, detailed information and internal design, compatible with PCI8 bit microcontroller instruction
(系统自动生成,下载前可以参看下载内容)
下载文件列表
CPU\PIC16C57用户手册.pdf
...\RISC8 CPU 结构 (risc8).gif
...\RISC8 CPU 说明书.html
...\TB\alu.v
...\..\basic.asm
...\..\BASIC.HEX
...\..\basic.rom
...\..\CPU.cr.mti
...\..\CPU.mpf
...\..\cpu.v
...\..\dds.asm
...\..\DDS.HEX
...\..\dds.rom
...\..\dram.v
...\..\exp.v
...\..\hex2v.c
...\..\idec.v
...\..\pram.v
...\..\regs.v
...\..\risc8.vcd
...\..\runit
...\..\sindata.c
...\..\sindata.hex
...\..\tcl_stacktrace.txt
...\..\test.v
...\..\test.v.bak
...\..\test.v~
...\..\vsim.wlf
...\..\work\alu\verilog.asm
...\..\....\...\_primary.dat
...\..\....\...\_primary.vhd
...\..\....\cpu\verilog.asm
...\..\....\...\_primary.dat
...\..\....\...\_primary.vhd
...\..\....\dram\verilog.asm
...\..\....\....\_primary.dat
...\..\....\....\_primary.vhd
...\..\....\exp\verilog.asm
...\..\....\...\_primary.dat
...\..\....\...\_primary.vhd
...\..\....\idec\verilog.asm
...\..\....\....\_primary.dat
...\..\....\....\_primary.vhd
...\..\....\pram\verilog.asm
...\..\....\....\_primary.dat
...\..\....\....\_primary.vhd
...\..\....\regs\verilog.asm
...\..\....\....\_primary.dat
...\..\....\....\_primary.vhd
...\..\....\test\verilog.asm
...\..\....\....\_primary.dat
...\..\....\....\_primary.vhd
...\..\....\_info
...\Thumbs.db
...\.B\work\alu
...\..\....\cpu
...\..\....\dram
...\..\....\exp
...\..\....\idec
...\..\....\pram
...\..\....\regs
...\..\....\test
...\..\work
...\TB
CPU