文件名称:all_cpu
介绍说明－－下载内容均来自于网络，请自行研究使用
精简指令集CPU，可完成移位，跳转等简单功能，适用于FPGA学习，本代码使用verilog编写。-RISC CPU, to be completed by the shift, jumps and other simple functions for FPGA learning to write the code using verilog.
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下载文件列表
all_cpu
.......\accum.v
.......\addr_decode.v
.......\addr_decode.v.bak
.......\adr.v
.......\all_cpu.asm.rpt
.......\all_cpu.cdf
.......\all_cpu.csv
.......\all_cpu.done
.......\all_cpu.eda.rpt
.......\all_cpu.fit.rpt
.......\all_cpu.fit.smsg
.......\all_cpu.fit.summary
.......\all_cpu.flow.rpt
.......\all_cpu.map.rpt
.......\all_cpu.map.smsg
.......\all_cpu.map.summary
.......\all_cpu.pin
.......\all_cpu.pof
.......\all_cpu.qpf
.......\all_cpu.qsf
.......\all_cpu.qsf.bak
.......\all_cpu.sof
.......\all_cpu.sta.rpt
.......\all_cpu.sta.summary
.......\all_cpu.v
.......\all_cpu.v.bak
.......\alu.v
.......\buf1.v
.......\button_onestep.v
.......\clk_convert.v
.......\clk_gen.v
.......\counter.v
.......\cpu.v
.......\cpu.v.bak
.......\datactl.v
.......\data_lock.v
.......\data_lock.v.bak
.......\db
.......\..\add_sub_lkc.tdf
.......\..\add_sub_mkc.tdf
.......\..\all_cpu.ae.hdb
.......\..\all_cpu.amm.cdb
.......\..\all_cpu.asm.qmsg
.......\..\all_cpu.asm.rdb
.......\..\all_cpu.asm_labs.ddb
.......\..\all_cpu.cbx.xml
.......\..\all_cpu.cmp.bpm
.......\..\all_cpu.cmp.cdb
.......\..\all_cpu.cmp.hdb
.......\..\all_cpu.cmp.kpt
.......\..\all_cpu.cmp.logdb
.......\..\all_cpu.cmp.rdb
.......\..\all_cpu.cmp0.ddb
.......\..\all_cpu.cmp1.ddb
.......\..\all_cpu.cmp2.ddb
.......\..\all_cpu.cmp_merge.kpt
.......\..\all_cpu.db_info
.......\..\all_cpu.eda.qmsg
.......\..\all_cpu.fit.qmsg
.......\..\all_cpu.hier_info
.......\..\all_cpu.hif
.......\..\all_cpu.idb.cdb
.......\..\all_cpu.lpc.html
.......\..\all_cpu.lpc.rdb
.......\..\all_cpu.lpc.txt
.......\..\all_cpu.map.bpm
.......\..\all_cpu.map.cdb
.......\..\all_cpu.map.hdb
.......\..\all_cpu.map.kpt
.......\..\all_cpu.map.logdb
.......\..\all_cpu.map.qmsg
.......\..\all_cpu.map_bb.cdb
.......\..\all_cpu.map_bb.hdb
.......\..\all_cpu.map_bb.logdb
.......\..\all_cpu.pre_map.cdb
.......\..\all_cpu.pre_map.hdb
.......\..\all_cpu.rpp.qmsg
.......\..\all_cpu.rtlv.hdb
.......\..\all_cpu.rtlv_sg.cdb
.......\..\all_cpu.rtlv_sg_swap.cdb
.......\..\all_cpu.sgate.rvd
.......\..\all_cpu.sgate_sm.rvd
.......\..\all_cpu.sgdiff.cdb
.......\..\all_cpu.sgdiff.hdb
.......\..\all_cpu.sld_design_entry.sci
.......\..\all_cpu.sld_design_entry_dsc.sci
.......\..\all_cpu.smart_action.txt
.......\..\all_cpu.smp_dump.txt
.......\..\all_cpu.sta.qmsg
.......\..\all_cpu.sta.rdb
.......\..\all_cpu.sta_cmp.8_slow.tdb
.......\..\all_cpu.syn_hier_info
.......\..\all_cpu.tis_db_list.ddb
.......\..\all_cpu.tmw_info
.......\..\altsyncram_dac1.tdf
.......\..\altsyncram_o771.tdf
.......\..\alt_u_div_mve.tdf
.......\..\alt_u_div_uve.tdf
.......\..\logic_util_heursitic.dat