文件名称:KEY
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如迅雷强制弹出,可右键点击选“另存为”。
失败请重下,重下不扣分。
介绍说明--下载内容均来自于网络,请自行研究使用
每个I/O端口位可以自由编程,然而I/0端口寄存器必须按32位字被访问(不允许半字或字节访问)。-Each I/O port bit is freely programmable, however the I/O port registers have to be accessed
as 32-bit words (half-word or byte accesses are not allowed).
as 32-bit words (half-word or byte accesses are not allowed).
(系统自动生成,下载前可以参看下载内容)
下载文件列表
KEY\HARDWARE\KEY\key.c
...\........\...\key.h
...\........\LED\led.c
...\........\...\led.h
...\keilkilll.bat
...\README.TXT
...\SYSTEM\delay\delay.c
...\......\.....\delay.h
...\......\sys\sys.c
...\......\...\sys.h
...\......\usart\usart.c
...\......\.....\usart.h
...\USER\delay.crf
...\....\delay.d
...\....\delay.o
...\....\JLink Regs CM3.txt
...\....\JLinkLog.txt
...\....\JLinkSettings.ini
...\....\key.crf
...\....\key.d
...\....\key.o
...\....\led.crf
...\....\led.d
...\....\led.o
...\....\STM32F10x.d
...\....\STM32F10x.lst
...\....\STM32F10x.o
...\....\STM32F10x.s
...\....\sys.crf
...\....\sys.d
...\....\sys.o
...\....\TEST.axf
...\....\test.c
...\....\test.crf
...\....\test.d
...\....\TEST.hex
...\....\TEST.htm
...\....\TEST.lnp
...\....\TEST.map
...\....\test.o
...\....\TEST.opt.bak
...\....\TEST.plg
...\....\TEST.sct
...\....\TEST.tra
...\....\TEST.Uv2.bak
...\....\TEST.uvopt
...\....\TEST.uvproj
...\....\test.__i
...\....\TEST_Opt.Bak
...\....\TEST_Target 1.dep
...\....\TEST_uvopt.bak
...\....\TEST_uvproj.bak
...\....\usart.crf
...\....\usart.d
...\....\usart.o
...\HARDWARE\KEY
...\........\LED
...\SYSTEM\delay
...\......\sys
...\......\usart
...\HARDWARE
...\SYSTEM
...\USER
KEY