文件名称:61IC_S4182
- 所属分类：
- 其他嵌入式/单片机内容
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2013-11-05
- 文件大小：
- 7.41mb
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- 0次
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- a***
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基于FPGA设计工具Xilinx ISE 编写的程序代码-Xilinx ISE FPGA-based design tools to write program code
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基于FPGA设计工具Xilinx ISE 编写的程序代码\Example-2-1\Project_Navigator_Demo\counter\automake.log
.........................................\...........\......................\.......\bitgen.ut
.........................................\...........\......................\.......\counter.ana
.........................................\...........\......................\.......\counter.bgn
.........................................\...........\......................\.......\counter.bit
.........................................\...........\......................\.......\counter.bld
.........................................\...........\......................\.......\counter.cmd_log
.........................................\...........\......................\.......\counter.dly
.........................................\...........\......................\.......\counter.drc
.........................................\...........\......................\.......\counter.jhd
.........................................\...........\......................\.......\counter.mrp
.........................................\...........\......................\.......\counter.nc1
.........................................\...........\......................\.......\counter.ncd
.........................................\...........\......................\.......\counter.ngc
.........................................\...........\......................\.......\counter.ngd
.........................................\...........\......................\.......\counter.ngm
.........................................\...........\......................\.......\counter.ngr
.........................................\...........\......................\.......\counter.npl
.........................................\...........\......................\.......\counter.pad
.........................................\...........\......................\.......\counter.par
.........................................\...........\......................\.......\counter.pcf
.........................................\...........\......................\.......\counter.prj
.........................................\...........\......................\.......\counter.ptf
.........................................\...........\......................\.......\counter.sprj
.........................................\...........\......................\.......\counter.stx
.........................................\...........\......................\.......\counter.syr
.........................................\...........\......................\.......\counter.tfi
.........................................\...........\......................\.......\counter.twr
.........................................\...........\......................\.......\counter.twx
.........................................\...........\......................\.......\counter.ut
.........................................\...........\......................\.......\counter.v
.........................................\...........\......................\.......\counter.xpi
.........................................\...........\......................\.......\counter_map.ncd
.........................................\...........\......................\.......\counter_map.ngm
.........................................\...........\......................\.......\counter_ngdbuild.nav
.........................................\...........\......................\.......\_ngo\netlist.lst
.........................................\...........\......................\.......\._projnav\bitgen.rsp
.........................................\...........\......................\.......\.........\counter.gfl
.........................................\...........\......................\.......\.........\counter.xst
.........................................\...........\......................\.......\.........\counter._prj
.........................................\...........\......................\.......\.........\counter._sprj
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