文件名称:8811462I2C_verilog
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I2C总线控制 I2C总线控制 I2C总线控制 -I2C bus control
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下载文件列表
I2C总线VHDL-Verilog+HDL源码\i2c\bench\CVS\Entries
...........................\...\.....\...\Repository
...........................\...\.....\...\Root
...........................\...\.....\verilog\CVS\Entries
...........................\...\.....\.......\...\Repository
...........................\...\.....\.......\...\Root
...........................\...\.....\.......\i2c_slave_model.v
...........................\...\.....\.......\spi_slave_model.v
...........................\...\.....\.......\tst_bench_top.v
...........................\...\.....\.......\wb_master_model.v
...........................\...\CVS\Entries
...........................\...\...\Repository
...........................\...\...\Root
...........................\...\doc\CVS\Entries
...........................\...\...\...\Repository
...........................\...\...\...\Root
...........................\...\...\i2c_specs.pdf
...........................\...\...\src\CVS\Entries
...........................\...\...\...\...\Repository
...........................\...\...\...\...\Root
...........................\...\...\...\I2C_specs.doc
...........................\...\...umentation\CVS\Entries
...........................\...\.............\...\Repository
...........................\...\.............\...\Root
...........................\...\rtl\CVS\Entries
...........................\...\...\...\Repository
...........................\...\...\...\Root
...........................\...\...\verilog\CVS\Entries
...........................\...\...\.......\...\Repository
...........................\...\...\.......\...\Root
...........................\...\...\.......\i2c_master_bit_ctrl.v
...........................\...\...\.......\i2c_master_byte_ctrl.v
...........................\...\...\.......\i2c_master_defines.v
...........................\...\...\.......\i2c_master_top.v
...........................\...\...\.......\timescale.v
...........................\...\...\.hdl\CVS\Entries
...........................\...\...\....\...\Repository
...........................\...\...\....\...\Root
...........................\...\...\....\I2C.VHD
...........................\...\...\....\i2c_master_bit_ctrl.vhd
...........................\...\...\....\i2c_master_byte_ctrl.vhd
...........................\...\...\....\i2c_master_top.vhd
...........................\...\...\....\readme
...........................\...\...\....\tst_ds1621.vhd
...........................\...\sim\CVS\Entries
...........................\...\...\...\Repository
...........................\...\...\...\Root
...........................\...\...\i2c_verilog\CVS\Entries
...........................\...\...\...........\...\Repository
...........................\...\...\...........\...\Root
...........................\...\...\...........\run\bench.vcd
...........................\...\...\...........\...\CVS\Entries
...........................\...\...\...........\...\...\Repository
...........................\...\...\...........\...\...\Root
...........................\...\...\...........\...\INCA_libs\CVS\Entries
...........................\...\...\...........\...\.........\...\Repository
...........................\...\...\...........\...\.........\...\Root
...........................\...\...\...........\...\ncverilog.key
...........................\...\...\...........\...\ncverilog.log
...........................\...\...\...........\...\run
...........................\...\...\...........\...\waves\CVS\Entries
...........................\...\...\...........\...\.....\...\Repository
...........................\...\...\...........\...\.....\...\Root
...........................\...\.oftware\CVS\Entries
...........................\...\........\...\Repository
...........................\...\........\...\Root
...........................\...\........\drivers\CVS\Entries
...........................\...\........\.......\...\Repository
...........................\...\........\.......\...\Root
...........................\...\........\include\CVS\Entries
...........................\...\........\.......\...\Repository
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