文件名称:lab16
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利用verilog设计一个数字秒表电路。可以通过按键开始计时,计时完毕,清零设定。-Use verilog design a digital stopwatch circuits. Can be key will begin counting is completed, clear the settings.
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下载文件列表
lab16\ise\.lso
.....\...\stopwatch.bgn
.....\...\stopwatch.bit
.....\...\stopwatch.bld
.....\...\stopwatch.cmd_log
.....\...\stopwatch.drc
.....\...\stopwatch.ise
.....\...\stopwatch.ise_ISE_Backup
.....\...\stopwatch.lso
.....\...\stopwatch.ncd
.....\...\stopwatch.ngc
.....\...\stopwatch.ngd
.....\...\stopwatch.ngr
.....\...\stopwatch.ntrc_log
.....\...\stopwatch.pad
.....\...\stopwatch.par
.....\...\stopwatch.pcf
.....\...\stopwatch.prj
.....\...\stopwatch.restore
.....\...\stopwatch.stx
.....\...\stopwatch.syr
.....\...\stopwatch.twr
.....\...\stopwatch.twx
.....\...\stopwatch.unroutes
.....\...\stopwatch.ut
.....\...\stopwatch.xpi
.....\...\stopwatch.xst
.....\...\stopwatch_dcm.tfi
.....\...\stopwatch_dcm.v
.....\...\stopwatch_dcm.xaw
.....\...\stopwatch_dcm_arwz.ucf
.....\...\stopwatch_guide.ncd
.....\...\stopwatch_map.map
.....\...\stopwatch_map.mrp
.....\...\stopwatch_map.ncd
.....\...\stopwatch_map.ngm
.....\...\stopwatch_pad.csv
.....\...\stopwatch_pad.txt
.....\...\stopwatch_prev_built.ngd
.....\...\stopwatch_summary.html
.....\...\stopwatch_summary.xml
.....\...\stopwatch_usage.xml
.....\...\xaw2verilog.log
.....\...\.st\dump.xst\stopwatch.prj\ntrc.scr
.....\...\...\work\hdllib.ref
.....\...\...\....\vlg05\control__1.bin
.....\...\...\....\....6\control__2.bin
.....\...\...\....\...10\counter.bin
.....\...\...\....\....D\stopwatch.bin
.....\...\...\....\....E\display.bin
.....\...\...\....\...28\dff.bin
.....\...\...\....\...33\button__press__unit.bin
.....\...\...\....\....8\div__n.bin
.....\...\...\....\....C\counter__10.bin
.....\...\...\....\.....\width.bin
.....\...\...\....\...47\div.bin
.....\...\...\....\...50\stopwatch__dcm.bin
.....\...\...\....\....5\counter__60.bin
.....\...\...\....\...6D\synch.bin
.....\...\_impact.cmd
.....\...\_impact.log
.....\...\.ngo\netlist.lst
.....\...\.xmsgs\bitgen.xmsgs
.....\...\......\map.xmsgs
.....\...\......\ngdbuild.xmsgs
.....\...\......\par.xmsgs
.....\...\......\trce.xmsgs
.....\...\......\xst.xmsgs
.....\sim\button_press_unit_tb.cr.mti
.....\...\button_press_unit_tb.mpf
.....\...\control_2_tb.cr.mti
.....\...\control_2_tb.mpf
.....\...\counter_tb.cr.mti
.....\...\counter_tb.mpf
.....\...\display.cr.mti
.....\...\display.mpf
.....\...\div_tb.cr.mti
.....\...\div_tb.mpf
.....\...\transcript
.....\...\vish_stacktrace.vstf
.....\...\vsim.wlf
.....\...\work\@_opt\vopt1evxsq
.....\...\....\.....\vopt1fr09s
.....\...\....\.....\vopt4c9mbs
.....\...\....\.....\vopt4ygtsq
.....\...\....\.....\vopt5fixrq
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.....\...\....\.....\voptbckebs
.....\...\....\.....\voptbyvksq
.....\...\....\.....\voptczrn8s
.....\...\....\.....\voptew9bbs
.....\...\....\.....\voptfehgsq
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.....\...\....\.....\voptnewasq
.....\...\....\.....\voptnwk5bs
.....\...\....\.....\voptsca1bs
.....\...\....\.....\voptted79s