文件名称:dzqin
- 所属分类:
- VHDL编程
- 资源属性:
- 上传时间:
- 2013-05-05
- 文件大小:
- 925kb
- 下载次数:
- 0次
- 提 供 者:
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
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介绍说明--下载内容均来自于网络,请自行研究使用
运用FPGA编写了一个简易电子琴,按不同的键就可以发出相应的声音,并且可以存储,按下一个键时就可以将存储器中的内容输出 发出相应的音节-Use the FPGA to write a simple keyboard, press different keys can be issued the corresponding sound, and can be stored, press a key on the contents of the memory can be output to issue the corresponding syllable
(系统自动生成,下载前可以参看下载内容)
下载文件列表
dzqin\db\add_sub_4rh.tdf
.....\..\add_sub_5rh.tdf
.....\..\add_sub_ish.tdf
.....\..\altsyncram_78u.tdf
.....\..\altsyncram_7ei1.tdf
.....\..\altsyncram_88u.tdf
.....\..\altsyncram_rqu.tdf
.....\..\altsyncram_scu.tdf
.....\..\altsyncram_squ.tdf
.....\..\altsyncram_taf1.tdf
.....\..\dzqin.asm.qmsg
.....\..\dzqin.cbx.xml
.....\..\dzqin.cmp.bpm
.....\..\dzqin.cmp.cdb
.....\..\dzqin.cmp.ecobp
.....\..\dzqin.cmp.hdb
.....\..\dzqin.cmp.logdb
.....\..\dzqin.cmp.rdb
.....\..\dzqin.cmp.tdb
.....\..\dzqin.cmp0.ddb
.....\..\dzqin.db_info
.....\..\dzqin.eco.cdb
.....\..\dzqin.eds_overflow
.....\..\dzqin.fit.qmsg
.....\..\dzqin.fnsim.hdb
.....\..\dzqin.fnsim.qmsg
.....\..\dzqin.hier_info
.....\..\dzqin.hif
.....\..\dzqin.map.bpm
.....\..\dzqin.map.cdb
.....\..\dzqin.map.ecobp
.....\..\dzqin.map.hdb
.....\..\dzqin.map.logdb
.....\..\dzqin.map.qmsg
.....\..\dzqin.map_bb.cdb
.....\..\dzqin.map_bb.hdb
.....\..\dzqin.map_bb.hdbx
.....\..\dzqin.map_bb.logdb
.....\..\dzqin.pre_map.cdb
.....\..\dzqin.pre_map.hdb
.....\..\dzqin.psp
.....\..\dzqin.root_partition.cmp.atm
.....\..\dzqin.root_partition.cmp.dfp
.....\..\dzqin.root_partition.cmp.hdbx
.....\..\dzqin.root_partition.cmp.logdb
.....\..\dzqin.root_partition.cmp.rcf
.....\..\dzqin.root_partition.map.atm
.....\..\dzqin.root_partition.map.hdbx
.....\..\dzqin.root_partition.map.info
.....\..\dzqin.rtlv.hdb
.....\..\dzqin.rtlv_sg.cdb
.....\..\dzqin.rtlv_sg_swap.cdb
.....\..\dzqin.sgdiff.cdb
.....\..\dzqin.sgdiff.hdb
.....\..\dzqin.signalprobe.cdb
.....\..\dzqin.sim.cvwf
.....\..\dzqin.sim.hdb
.....\..\dzqin.sim.qmsg
.....\..\dzqin.sim.rdb
.....\..\dzqin.simfam
.....\..\dzqin.sld_design_entry.sci
.....\..\dzqin.sld_design_entry_dsc.sci
.....\..\dzqin.syn_hier_info
.....\..\dzqin.tan.qmsg
.....\..\dzqin.tis_db_list.ddb
.....\..\dzqin.tmw_info
.....\..\dzqin0.rtl.mif
.....\..\logic_util_heursitic.dat
.....\..\mux_0hc.tdf
.....\..\mux_1hc.tdf
.....\..\mux_cfc.tdf
.....\..\mux_ric.tdf
.....\..\prev_cmp_dzqin.asm.qmsg
.....\..\prev_cmp_dzqin.fit.qmsg
.....\..\prev_cmp_dzqin.map.qmsg
.....\..\prev_cmp_dzqin.qmsg
.....\..\prev_cmp_dzqin.sim.qmsg
.....\..\prev_cmp_dzqin.tan.qmsg
.....\..\ps2scan0.rtl.mif
.....\..\wed.wsf
.....\dzqin.asm.rpt
.....\dzqin.bdf
.....\dzqin.cdf
.....\dzqin.done
.....\dzqin.dpf
.....\dzqin.fit.rpt
.....\dzqin.fit.smsg
.....\dzqin.fit.summary
.....\dzqin.flow.rpt
.....\dzqin.map.rpt
.....\dzqin.map.summary
.....\dzqin.pin
.....\dzqin.pof
.....\dzqin.qpf
.....\dzqin.qsf
.....\dzqin.qws
.....\dzqin.sim.rpt
.....\dzqin.sof
.....\dzqin.tan.rpt
.....\dzqin.tan.summary