文件名称:aes_verilog
下载
别用迅雷、360浏览器下载。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
介绍说明－－下载内容均来自于网络，请自行研究使用
AES算法的Verilog实现，简单易懂-Verilog implementation of the AES algorithm, easy-to-understand
(系统自动生成,下载前可以参看下载内容)
下载文件列表
aes_core
........\bench
........\.....\CVS
........\.....\...\Entries
........\.....\...\Repository
........\.....\...\Root
........\.....\verilog
........\.....\.......\CVS
........\.....\.......\...\Entries
........\.....\.......\...\Repository
........\.....\.......\...\Root
........\.....\.......\test_bench_top.v
........\CVS
........\...\Entries
........\...\Repository
........\...\Root
........\doc
........\...\aes.pdf
........\...\CVS
........\...\...\Entries
........\...\...\Repository
........\...\...\Root
........\rtl
........\...\CVS
........\...\...\Entries
........\...\...\Repository
........\...\...\Root
........\...\verilog
........\...\.......\AES
........\...\.......\AES.zip
........\...\.......\aes_cipher_top.v
........\...\.......\aes_inv_cipher_top.v
........\...\.......\aes_inv_sbox.v
........\...\.......\aes_key_expand_128.v
........\...\.......\aes_rcon.v
........\...\.......\aes_sbox.v
........\...\.......\CVS
........\...\.......\...\Entries
........\...\.......\...\Repository
........\...\.......\...\Root
........\...\.......\timescale.v
........\sim
........\...\CVS
........\...\...\Entries
........\...\...\Repository
........\...\...\Root
........\...\rtl_sim
........\...\.......\bin
........\...\.......\...\CVS
........\...\.......\...\...\Entries
........\...\.......\...\...\Repository
........\...\.......\...\...\Root
........\...\.......\...\Makefile
........\...\.......\CVS
........\...\.......\...\Entries
........\...\.......\...\Repository
........\...\.......\...\Root
........\...\.......\run
........\...\.......\...\CVS
........\...\.......\...\...\Entries
........\...\.......\...\...\Repository
........\...\.......\...\...\Root
........\...\.......\...\waves
........\...\.......\...\.....\CVS
........\...\.......\...\.....\...\Entries
........\...\.......\...\.....\...\Repository
........\...\.......\...\.....\...\Root
........\...\.......\...\.....\waves.do
........\syn
........\...\bin
........\...\...\comp.dc
........\...\...\CVS
........\...\...\...\Entries
........\...\...\...\Repository
........\...\...\...\Root
........\...\...\design_spec.dc
........\...\...\lib_spec.dc
........\...\...\read.dc
........\...\CVS
........\...\...\Entries
........\...\...\Repository
........\...\...\Root
........\vim_session.vim