文件名称:synthesis
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Verilog code and some basic examples.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
synthesis\iftocase_modify\dut\iftocase_modify.v
.........\.._else\dut\if_else.v
.........\...ser\dut\if_ser.v
.........\.nfer_mux\dut\infer_mux.v
.........\........._error\dut\infer_mux_error.v
.........\Mux_bus_boolean\dut\mux_bus_boolean.v
.........\........case_if\dut\mux_bus_case_if.v
.........\Blocking & NonBlocking\blocking\dut\blocking.v
.........\......................\Nonblocking\dut\NonBlocking.v
.........\diff\case\dut\case.v
.........\....\if\dut\if.v
.........\evenparity\even\dut\even.v
.........\..........\odd\dut\odd.v
.........\fullcase\equivalence\dut\equivalence.v
.........\........\reference\dut\reference.v
.........\ifseries\dut\ifelse.v
.........\........\Thumbs.db
.........\........_ifelse\dut\ifseries_ifelse.v
.........\..tocasex_modify\dut\iftocasex_modify.v
.........\Blocking & NonBlocking\blocking\dut
.........\......................\........\GUI
.........\......................\........\run
.........\......................\Nonblocking\dut
.........\......................\...........\GUI
.........\......................\...........\run
.........\diff\case\dut
.........\....\....\GUI
.........\....\....\run
.........\....\if\dut
.........\....\..\GUI
.........\....\..\run
.........\evenparity\even\dut
.........\..........\....\GUI
.........\..........\....\run
.........\..........\odd\dut
.........\..........\...\GUI
.........\..........\...\run
.........\fullcase\equivalence\dut
.........\........\...........\GUI
.........\........\...........\run
.........\........\reference\dut
.........\........\.........\GUI
.........\........\.........\run
.........\iftocase_modify\dut
.........\...............\GUI
.........\...............\run
.........\.._else\dut
.........\.......\GUI
.........\.......\run
.........\...ser\dut
.........\......\run
.........\.nfer_mux\dut
.........\.........\GUI
.........\.........\run
.........\........._error\dut
.........\...............\GUI
.........\...............\run
.........\Mux_bus_boolean\dut
.........\...............\GUI
.........\...............\run
.........\........case_if\dut
.........\...............\GUI
.........\...............\run
.........\Blocking & NonBlocking\blocking
.........\......................\Nonblocking
.........\diff\case
.........\....\if
.........\evenparity\even
.........\..........\odd
.........\fullcase\equivalence
.........\........\reference
.........\ifseries\dut
.........\........\GUI
.........\........\run
.........\........_ifelse\dut
.........\...............\GUI
.........\...............\run
.........\..tocasex_modify\GUI
.........\................\run
.........\................\dut
.........\iftocase_modify
.........\if_else
.........\if_ser
.........\infer_mux
.........\infer_mux_error
.........\Mux_bus_boolean
.........\Mux_bus_case_if
.........\Blocking & NonBlocking
.........\diff
.........\evenparity
.........\fullcase
.........\ifseries
.........\ifseries_ifelse
.........\iftocasex_modify
synthesis