文件名称:AD_FIFO
- 所属分类：
- VHDL编程
- 资源属性：
- [PDF]
- 上传时间：
- 2013-01-26
- 文件大小：
- 3.77mb
- 下载次数：
- 0次
- 提 供 者：
- ZHU X******
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
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介绍说明－－下载内容均来自于网络，请自行研究使用
简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置-Simple Verilog program for test the AD to DA loop of universal audio test platform.
Please configure it according to the test environment before download and implement the program to FPGA
Please configure it according to the test environment before download and implement the program to FPGA
(系统自动生成,下载前可以参看下载内容)
下载文件列表
AD_FIFO
.......\_xmsgs
.......\......\pn_parser.xmsgs
.......\ipcore_dir
.......\..........\_xmsgs
.......\..........\......\cg.xmsgs
.......\..........\coregen.cgp
.......\..........\coregen.log
.......\..........\edit_fifo_generator_v8_4.tcl
.......\..........\fifo_generator_ug175.pdf
.......\..........\fifo_generator_v8_4
.......\..........\...................\example_design
.......\..........\...................\..............\fifo_generator_v8_4_top.ucf
.......\..........\...................\..............\fifo_generator_v8_4_top.vhd
.......\..........\...................\..............\fifo_generator_v8_4_top.xdc
.......\..........\...................\..............\fifo_generator_v8_4_top_wrapper.vhd
.......\..........\...................\implement
.......\..........\...................\.........\implement.bat
.......\..........\...................\.........\implement.sh
.......\..........\...................\.........\planAhead_rdn.bat
.......\..........\...................\.........\planAhead_rdn.sh
.......\..........\...................\.........\planAhead_rdn.tcl
.......\..........\...................\.........\xst.prj
.......\..........\...................\.........\xst.scr
.......\..........\...................\simulation
.......\..........\...................\..........\fg_tb_dgen.vhd
.......\..........\...................\..........\fg_tb_dverif.vhd
.......\..........\...................\..........\fg_tb_pctrl.vhd
.......\..........\...................\..........\fg_tb_pkg.vhd
.......\..........\...................\..........\fg_tb_rng.vhd
.......\..........\...................\..........\fg_tb_synth.vhd
.......\..........\...................\..........\fg_tb_top.vhd
.......\..........\...................\..........\functional
.......\..........\...................\..........\..........\simulate_isim.bat
.......\..........\...................\..........\..........\simulate_mti.do
.......\..........\...................\..........\..........\simulate_ncsim.sh
.......\..........\...................\..........\..........\wave_isim.tcl
.......\..........\...................\..........\..........\wave_mti.do
.......\..........\...................\..........\..........\wave_ncsim.sv
.......\..........\...................\..........\timing
.......\..........\...................\..........\......\simulate_isim.bat
.......\..........\...................\..........\......\simulate_mti.do
.......\..........\...................\..........\......\simulate_ncsim.sh
.......\..........\...................\..........\......\wave_isim.tcl
.......\..........\...................\..........\......\wave_mti.do
.......\..........\...................\..........\......\wave_ncsim.sv
.......\..........\fifo_generator_v8_4.asy
.......\..........\fifo_generator_v8_4.ngc
.......\..........\fifo_generator_v8_4.v
.......\..........\fifo_generator_v8_4.veo
.......\..........\fifo_generator_v8_4.xco
.......\..........\fifo_generator_v8_4_flist.txt
.......\..........\fifo_generator_v8_4_readme.txt
.......\..........\fifo_generator_v8_4_xmdf.tcl
.......\..........\tmp
.......\..........\...\_cg
.......\..........\...\...\_dbg
.......\..........\...\...\....\xil_537.in
.......\..........\...\...\....\xil_537.out
.......\..........\...\_xmsgs
.......\..........\...\......\xst.xmsgs
.......\..........\...\fifo_generator_v8_4.lso
.......\..........\xlnx_auto_0_xdb
.......\iseconfig
.......\.........\ADDA_LB.projectmgr
.......\source
.......\......\ADDA_LB_TEST.v
.......\......\ADDA_LB_UCF.cdc
.......\......\ADDA_LB_UCF.ucf
.......\......\AD_PCM_IF.v
.......\......\DA_PCM_IF.v
.......\......\PLL.v
.......\xillinx
.......\.......\ADDA_LB.gise
.......\.......\ADDA_LB.xise
.......\.......\ADDA_LB_TEST_beh.prj
.......\.......\ADDA_LB_TEST_isim_beh.exe
.......\.......\ADDA_LB_TEST_isim_beh.wdb
.......\.......\ADDA_LB_TEST_stx_beh.prj
.......\.......\ADDA_LB_TOP.bld
.......\.......\ADDA_LB_TOP.cmd_log
.......\.......\ADDA_LB_TOP.lso
.......\.......\ADDA_LB_TOP.ncd
.......\.......\ADDA_LB_TOP.ngc
.......\.......\ADDA_LB_TOP.ngd
.......\.......\ADDA_