文件名称:firOK
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一个已经经过验证正确的数字滤波器源码,希望大家喜欢-One has been proven correct digital filter source code, hope you like! !
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下载文件列表
firOK\add121313.bsf
.....\add121313.vhd
.....\add121414.bsf
.....\add121414.vhd
.....\add121616.bsf
.....\add121616.vhd
.....\add141616.bsf
.....\add141616.vhd
.....\add888.bsf
.....\add888.vhd
.....\add889.bsf
.....\add889.vhd
.....\cmp_state.ini
.....\dff15.bsf
.....\dff15.vhd
.....\dff8.bsf
.....\dff8.vhd
.....\dff89.bsf
.....\dff89.vhd
.....\fir.asm.rpt
.....\fir.bdf
.....\fir.done
.....\fir.fit.eqn
.....\fir.fit.rpt
.....\fir.flow.rpt
.....\fir.map.eqn
.....\fir.map.rpt
.....\fir.map.summary
.....\fir.pin
.....\fir.pof
.....\fir.qpf
.....\fir.qsf
.....\fir.qws
.....\fir.sim.rpt
.....\fir.sof
.....\fir.tan.rpt
.....\fir.tan.summary
.....\fir.vwf
.....\fir_assignment_defaults.qdf
.....\mult12.bsf
.....\mult12.vhd
.....\mult13.bsf
.....\mult13.vhd
.....\mult14.bsf
.....\mult14.vhd
.....\mult162.bsf
.....\mult162.vhd
.....\mult18.bsf
.....\mult18.vhd
.....\mult242.bsf
.....\mult242.vhd
.....\mult29.bsf
.....\mult29.vhd
.....\mult52.bsf
.....\mult52.vhd
.....\sim.cfg
.....\sub131314.bsf
.....\sub131314.vhd
.....\sub141616.bsf
.....\sub141616.vhd
.....\db\fir-sim.vwf
.....\..\fir.cbx.xml
.....\..\fir.dbp
.....\..\fir.db_info
.....\..\fir.hier_info
.....\..\fir.hif
.....\..\fir.psp
.....\..\fir.syn_hier_info
.....\..\fir_cmp.qrpt
.....\..\fir_hier_info
.....\..\fir_sim.qrpt
.....\..\fir_syn_hier_info
.....\..\wed.zsf
.....\..\fir.map.qmsg
.....\..\fir.rtlv_sg.cdb
.....\..\fir.rtlv.hdb
.....\..\fir.rtlv_sg_swap.cdb
.....\..\fir.pre_map.hdb
.....\..\fir.pre_map.cdb
.....\..\fir.map.logdb
.....\..\fir.sgdiff.cdb
.....\..\fir.sgdiff.hdb
.....\..\fir.sld_design_entry_dsc.sci
.....\..\fir.map.cdb
.....\..\fir.map.hdb
.....\..\fir.fit.qmsg
.....\..\fir.cmp.logdb
.....\..\fir.cmp.kpt
.....\..\fir.asm.qmsg
.....\..\fir.tan.qmsg
.....\..\fir.cmp.tdb
.....\..\fir.cmp0.ddb
.....\..\fir.cmp.cdb
.....\..\fir.signalprobe.cdb
.....\..\fir.cmp.hdb
.....\..\fir.cmp.rdb
.....\..\fir.sim.qmsg
.....\..\fir.sim.hdb
.....\..\fir.eds_overflow
.....\..\fir.sim.vwf