文件名称:RISC-CPU-design
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16位RISC-CPU设计，高四位为操作码，低12位为地址，寻址空间位4KB。包含12条指令（预设16条指令），3个基本测试文件及其Modelsim仿真结果。-16-bit RISC-CPU design, the high four bits for the opcode, the lower 12 address, the address space of 4KB. Consists of 12 instructions (default 16 instructions), the three basic test file and Modelsim simulation results.
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下载文件列表
RISC CPU design
...............\CPU Design.pdf
...............\Screenshot-1.png
...............\Screenshot-2.png
...............\Screenshot.png
...............\accum.v
...............\addr_decode.v
...............\adr.v
...............\alu.v
...............\clk_gen.v
...............\counter.v
...............\cpu.v
...............\datactl.v
...............\machine.v
...............\machinectl.v
...............\out_reg.v
...............\ram.v
...............\register.v
...............\rom.v
...............\t.v
...............\test result.txt
...............\test1.dat
...............\test1.png
...............\test1.pro
...............\test2.dat
...............\test2.png
...............\test2.pro
...............\test3.dat
...............\test3.png
...............\test3.pro
...............\CPU Design.pdf
...............\Screenshot-1.png
...............\Screenshot-2.png
...............\Screenshot.png
...............\accum.v
...............\addr_decode.v
...............\adr.v
...............\alu.v
...............\clk_gen.v
...............\counter.v
...............\cpu.v
...............\datactl.v
...............\machine.v
...............\machinectl.v
...............\out_reg.v
...............\ram.v
...............\register.v
...............\rom.v
...............\t.v
...............\test result.txt
...............\test1.dat
...............\test1.png
...............\test1.pro
...............\test2.dat
...............\test2.png
...............\test2.pro
...............\test3.dat
...............\test3.png
...............\test3.pro