文件名称:8weicpu
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VHDL语言设计的8位简单的CPU，可以实现包括加法，减法，移位操作，赋值，自加等十多种基本的操作-8 of the VHDL language simple CPU, you can achieve more than 10 kinds of basic operations including addition, subtraction, shift operations, assignment, since Canada
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下载文件列表
8位cpu\ALU.bsf
......\ALU.vhd
......\ALU.vhd.bak
......\aluuu.bdf
......\cpu_defs.vhd
......\cpu_defs.vhd.bak
......\db\add_sub_4lh.tdf
......\..\add_sub_enh.tdf
......\..\add_sub_fnh.tdf
......\..\add_sub_gnh.tdf
......\..\add_sub_lch.tdf
......\..\add_sub_mch.tdf
......\..\add_sub_rjh.tdf
......\..\add_sub_sjh.tdf
......\..\logic_util_heursitic.dat
......\..\prev_cmp_simCPU.asm.qmsg
......\..\prev_cmp_simCPU.fit.qmsg
......\..\prev_cmp_simCPU.map.qmsg
......\..\prev_cmp_simCPU.qmsg
......\..\prev_cmp_simCPU.sim.qmsg
......\..\prev_cmp_simCPU.tan.qmsg
......\..\simCPU.asm.qmsg
......\..\simCPU.cbx.xml
......\..\simCPU.cmp.cdb
......\..\simCPU.cmp.hdb
......\..\simCPU.cmp.logdb
......\..\simCPU.cmp.rdb
......\..\simCPU.cmp.tdb
......\..\simCPU.cmp0.ddb
......\..\simCPU.db_info
......\..\simCPU.eco.cdb
......\..\simCPU.fit.qmsg
......\..\simCPU.hier_info
......\..\simCPU.hif
......\..\simCPU.lpc.html
......\..\simCPU.lpc.rdb
......\..\simCPU.lpc.txt
......\..\simCPU.map.cdb
......\..\simCPU.map.hdb
......\..\simCPU.map.logdb
......\..\simCPU.map.qmsg
......\..\simCPU.pre_map.cdb
......\..\simCPU.pre_map.hdb
......\..\simCPU.rpp.qmsg
......\..\simCPU.rtlv.hdb
......\..\simCPU.rtlv_sg.cdb
......\..\simCPU.rtlv_sg_swap.cdb
......\..\simCPU.sgate.rvd
......\..\simCPU.sgate_sm.rvd
......\..\simCPU.sgdiff.cdb
......\..\simCPU.sgdiff.hdb
......\..\simCPU.sim.cvwf
......\..\simCPU.sld_design_entry.sci
......\..\simCPU.sld_design_entry_dsc.sci
......\..\simCPU.smp_dump.txt
......\..\simCPU.syn_hier_info
......\..\simCPU.tan.qmsg
......\..\simCPU.tis_db_list.ddb
......\..\wed.wsf
......\fre2.vhd
......\fre2.vhd.bak
......\incremental_db\compiled_partitions\simCPU.root_partition.cmp.cdb
......\..............\...................\simCPU.root_partition.cmp.dfp
......\..............\...................\simCPU.root_partition.cmp.hdb
......\..............\...................\simCPU.root_partition.cmp.kpt
......\..............\...................\simCPU.root_partition.cmp.logdb
......\..............\...................\simCPU.root_partition.cmp.rcfdb
......\..............\...................\simCPU.root_partition.cmp.re.rcfdb
......\..............\...................\simCPU.root_partition.map.cdb
......\..............\...................\simCPU.root_partition.map.dpi
......\..............\...................\simCPU.root_partition.map.hdb
......\..............\...................\simCPU.root_partition.map.kpt
......\..............\README
......\IR.bsf
......\IR.vhd
......\IR.vhd.bak
......\PC.vhd
......\PC.vhd.bak
......\RAM.vhd
......\RAM.vhd.bak
......\reg.bsf
......\reg.vhd
......\reg.vhd.bak
......\registers.vhd
......\registers.vhd.bak
......\ROM.vhd
......\ROM.vhd.bak
......\sequencer.vhd
......\sequencer.vhd.bak
......\shift.bsf
......\shift.vhd
......\shift.vhd.bak
......\simCPU.asm.rpt
......\simCPU.bsf
......\simCPU.done
......\simCPU.dpf
......\simCPU.fit.rpt
......\simCPU.fit.smsg
......\simCPU.fit.summary
......\simCPU.flow.rpt
......\ALU.vhd
......\ALU.vhd.bak
......\aluuu.bdf
......\cpu_defs.vhd
......\cpu_defs.vhd.bak
......\db\add_sub_4lh.tdf
......\..\add_sub_enh.tdf
......\..\add_sub_fnh.tdf
......\..\add_sub_gnh.tdf
......\..\add_sub_lch.tdf
......\..\add_sub_mch.tdf
......\..\add_sub_rjh.tdf
......\..\add_sub_sjh.tdf
......\..\logic_util_heursitic.dat
......\..\prev_cmp_simCPU.asm.qmsg
......\..\prev_cmp_simCPU.fit.qmsg
......\..\prev_cmp_simCPU.map.qmsg
......\..\prev_cmp_simCPU.qmsg
......\..\prev_cmp_simCPU.sim.qmsg
......\..\prev_cmp_simCPU.tan.qmsg
......\..\simCPU.asm.qmsg
......\..\simCPU.cbx.xml
......\..\simCPU.cmp.cdb
......\..\simCPU.cmp.hdb
......\..\simCPU.cmp.logdb
......\..\simCPU.cmp.rdb
......\..\simCPU.cmp.tdb
......\..\simCPU.cmp0.ddb
......\..\simCPU.db_info
......\..\simCPU.eco.cdb
......\..\simCPU.fit.qmsg
......\..\simCPU.hier_info
......\..\simCPU.hif
......\..\simCPU.lpc.html
......\..\simCPU.lpc.rdb
......\..\simCPU.lpc.txt
......\..\simCPU.map.cdb
......\..\simCPU.map.hdb
......\..\simCPU.map.logdb
......\..\simCPU.map.qmsg
......\..\simCPU.pre_map.cdb
......\..\simCPU.pre_map.hdb
......\..\simCPU.rpp.qmsg
......\..\simCPU.rtlv.hdb
......\..\simCPU.rtlv_sg.cdb
......\..\simCPU.rtlv_sg_swap.cdb
......\..\simCPU.sgate.rvd
......\..\simCPU.sgate_sm.rvd
......\..\simCPU.sgdiff.cdb
......\..\simCPU.sgdiff.hdb
......\..\simCPU.sim.cvwf
......\..\simCPU.sld_design_entry.sci
......\..\simCPU.sld_design_entry_dsc.sci
......\..\simCPU.smp_dump.txt
......\..\simCPU.syn_hier_info
......\..\simCPU.tan.qmsg
......\..\simCPU.tis_db_list.ddb
......\..\wed.wsf
......\fre2.vhd
......\fre2.vhd.bak
......\incremental_db\compiled_partitions\simCPU.root_partition.cmp.cdb
......\..............\...................\simCPU.root_partition.cmp.dfp
......\..............\...................\simCPU.root_partition.cmp.hdb
......\..............\...................\simCPU.root_partition.cmp.kpt
......\..............\...................\simCPU.root_partition.cmp.logdb
......\..............\...................\simCPU.root_partition.cmp.rcfdb
......\..............\...................\simCPU.root_partition.cmp.re.rcfdb
......\..............\...................\simCPU.root_partition.map.cdb
......\..............\...................\simCPU.root_partition.map.dpi
......\..............\...................\simCPU.root_partition.map.hdb
......\..............\...................\simCPU.root_partition.map.kpt
......\..............\README
......\IR.bsf
......\IR.vhd
......\IR.vhd.bak
......\PC.vhd
......\PC.vhd.bak
......\RAM.vhd
......\RAM.vhd.bak
......\reg.bsf
......\reg.vhd
......\reg.vhd.bak
......\registers.vhd
......\registers.vhd.bak
......\ROM.vhd
......\ROM.vhd.bak
......\sequencer.vhd
......\sequencer.vhd.bak
......\shift.bsf
......\shift.vhd
......\shift.vhd.bak
......\simCPU.asm.rpt
......\simCPU.bsf
......\simCPU.done
......\simCPU.dpf
......\simCPU.fit.rpt
......\simCPU.fit.smsg
......\simCPU.fit.summary
......\simCPU.flow.rpt