文件名称:CI
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FPGA实现FFt算法和互相关算法,有硬件结构图和相应的程序。-FPGA implementation FFt algorithm and cross-correlation algorithm
(系统自动生成,下载前可以参看下载内容)
下载文件列表
CI\ci_comp.asm.rpt
..\ci_comp.done
..\ci_comp.fit.eqn
..\ci_comp.fit.rpt
..\ci_comp.fit.summary
..\ci_comp.flow.rpt
..\ci_comp.map.eqn
..\ci_comp.map.rpt
..\ci_comp.map.summary
..\ci_comp.pin
..\ci_comp.pof
..\ci_comp.qpf
..\ci_comp.qsf
..\ci_comp.qws
..\ci_comp.sim.rpt
..\ci_comp.sof
..\ci_comp.tan.rpt
..\ci_comp.tan.summary
..\ci_comp.vhd
..\ci_comp.vwf
..\ci_comp_wave0.jpg
..\ci_comp_waveforms.html
..\cmp_state.ini
..\db\ci_comp.asm.qmsg
..\..\ci_comp.cbx.xml
..\..\ci_comp.cmp.cdb
..\..\ci_comp.cmp.hdb
..\..\ci_comp.cmp.rdb
..\..\ci_comp.cmp.tdb
..\..\ci_comp.cmp0.ddb
..\..\ci_comp.db_info
..\..\ci_comp.eco.cdb
..\..\ci_comp.eds_overflow
..\..\ci_comp.fit.qmsg
..\..\ci_comp.hier_info
..\..\ci_comp.hif
..\..\ci_comp.map.cdb
..\..\ci_comp.map.hdb
..\..\ci_comp.map.qmsg
..\..\ci_comp.pre_map.cdb
..\..\ci_comp.pre_map.hdb
..\..\ci_comp.psp
..\..\ci_comp.rtlv.hdb
..\..\ci_comp.rtlv_sg.cdb
..\..\ci_comp.rtlv_sg_swap.cdb
..\..\ci_comp.sgdiff.cdb
..\..\ci_comp.sgdiff.hdb
..\..\ci_comp.signalprobe.cdb
..\..\ci_comp.sim.hdb
..\..\ci_comp.sim.qmsg
..\..\ci_comp.sim.rdb
..\..\ci_comp.sim.vwf
..\..\ci_comp.sld_design_entry.sci
..\..\ci_comp.sld_design_entry_dsc.sci
..\..\ci_comp.syn_hier_info
..\..\ci_comp.tan.qmsg
..\..\ci_comp_cmp.qrpt
..\..\ci_comp_sim.qrpt
..\DeviceSOPC_StandardCore\cmp_state.ini
..\.......................\component_builder_logfile.txt
..\.......................\cpu_0.ocp
..\.......................\cpu_0.v
..\.......................\cpu_0_jtag_debug_module.v
..\.......................\cpu_0_jtag_debug_module_wrapper.v
..\.......................\cpu_0_mult_cell.v
..\.......................\cpu_0_ociram_default_contents.mif
..\.......................\cpu_0_test_bench.v
..\.......................\delay_reset_block.bdf
..\.......................\delay_reset_block.bsf
..\.......................\DM9000_IRQ.v
..\.......................\DM9000_RST.v
..\.......................\dma.v
..\.......................\epcs_controller.v
..\.......................\epcs_controller_boot_rom.hex
..\.......................\high_res_timer.v
..\.......................\i2c_master.v
..\.......................\i2c_master_bit_ctrl.vhd
..\.......................\i2c_master_byte_ctrl.vhd
..\.......................\i2c_master_top.vhd
..\.......................\ic_tag_ram.mif
..\.......................\jtag_uart.v
..\.......................\key_pio.v
..\.......................\led.v
..\.......................\led_pio.v
..\.......................\oc_i2c_master.vhd
..\.......................\onchip_ram.hex
..\.......................\onchip_ram.v
..\.......................\opencores_i2c_master.v
..\.......................\p0_2_p0_3.v
..\.......................\p0_7_p0_30.v
..\.......................\p1_16_p1_25.v
..\.......................\p2_16_p2_31.v
..\.......................\PLL.bsf
..\.......................\PLL.v
..\.......................\reset_counter.bsf
..\.......................\reset_counter.v
..\.......................\rf_ram_a.mif
..\.......................\rf_ram_b.mif
..\.......................\SCL.v
..\.......................\SDA.v
..\ci_comp.done
..\ci_comp.fit.eqn
..\ci_comp.fit.rpt
..\ci_comp.fit.summary
..\ci_comp.flow.rpt
..\ci_comp.map.eqn
..\ci_comp.map.rpt
..\ci_comp.map.summary
..\ci_comp.pin
..\ci_comp.pof
..\ci_comp.qpf
..\ci_comp.qsf
..\ci_comp.qws
..\ci_comp.sim.rpt
..\ci_comp.sof
..\ci_comp.tan.rpt
..\ci_comp.tan.summary
..\ci_comp.vhd
..\ci_comp.vwf
..\ci_comp_wave0.jpg
..\ci_comp_waveforms.html
..\cmp_state.ini
..\db\ci_comp.asm.qmsg
..\..\ci_comp.cbx.xml
..\..\ci_comp.cmp.cdb
..\..\ci_comp.cmp.hdb
..\..\ci_comp.cmp.rdb
..\..\ci_comp.cmp.tdb
..\..\ci_comp.cmp0.ddb
..\..\ci_comp.db_info
..\..\ci_comp.eco.cdb
..\..\ci_comp.eds_overflow
..\..\ci_comp.fit.qmsg
..\..\ci_comp.hier_info
..\..\ci_comp.hif
..\..\ci_comp.map.cdb
..\..\ci_comp.map.hdb
..\..\ci_comp.map.qmsg
..\..\ci_comp.pre_map.cdb
..\..\ci_comp.pre_map.hdb
..\..\ci_comp.psp
..\..\ci_comp.rtlv.hdb
..\..\ci_comp.rtlv_sg.cdb
..\..\ci_comp.rtlv_sg_swap.cdb
..\..\ci_comp.sgdiff.cdb
..\..\ci_comp.sgdiff.hdb
..\..\ci_comp.signalprobe.cdb
..\..\ci_comp.sim.hdb
..\..\ci_comp.sim.qmsg
..\..\ci_comp.sim.rdb
..\..\ci_comp.sim.vwf
..\..\ci_comp.sld_design_entry.sci
..\..\ci_comp.sld_design_entry_dsc.sci
..\..\ci_comp.syn_hier_info
..\..\ci_comp.tan.qmsg
..\..\ci_comp_cmp.qrpt
..\..\ci_comp_sim.qrpt
..\DeviceSOPC_StandardCore\cmp_state.ini
..\.......................\component_builder_logfile.txt
..\.......................\cpu_0.ocp
..\.......................\cpu_0.v
..\.......................\cpu_0_jtag_debug_module.v
..\.......................\cpu_0_jtag_debug_module_wrapper.v
..\.......................\cpu_0_mult_cell.v
..\.......................\cpu_0_ociram_default_contents.mif
..\.......................\cpu_0_test_bench.v
..\.......................\delay_reset_block.bdf
..\.......................\delay_reset_block.bsf
..\.......................\DM9000_IRQ.v
..\.......................\DM9000_RST.v
..\.......................\dma.v
..\.......................\epcs_controller.v
..\.......................\epcs_controller_boot_rom.hex
..\.......................\high_res_timer.v
..\.......................\i2c_master.v
..\.......................\i2c_master_bit_ctrl.vhd
..\.......................\i2c_master_byte_ctrl.vhd
..\.......................\i2c_master_top.vhd
..\.......................\ic_tag_ram.mif
..\.......................\jtag_uart.v
..\.......................\key_pio.v
..\.......................\led.v
..\.......................\led_pio.v
..\.......................\oc_i2c_master.vhd
..\.......................\onchip_ram.hex
..\.......................\onchip_ram.v
..\.......................\opencores_i2c_master.v
..\.......................\p0_2_p0_3.v
..\.......................\p0_7_p0_30.v
..\.......................\p1_16_p1_25.v
..\.......................\p2_16_p2_31.v
..\.......................\PLL.bsf
..\.......................\PLL.v
..\.......................\reset_counter.bsf
..\.......................\reset_counter.v
..\.......................\rf_ram_a.mif
..\.......................\rf_ram_b.mif
..\.......................\SCL.v
..\.......................\SDA.v