文件名称:jiandan28
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基于VHDL的CPLD频率计，考虑节省资源的设计方案-Based on VHDL CPLD frequency meter, consider a resource-saving design
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下载文件列表
jiandan28
.........\count10.bsf
.........\count10.vhd
.........\count10.vhd.bak
.........\db
.........\..\add_sub_0nh.tdf
.........\..\add_sub_1nh.tdf
.........\..\add_sub_ioh.tdf
.........\..\add_sub_jlh.tdf
.........\..\add_sub_klh.tdf
.........\..\add_sub_vmh.tdf
.........\..\jiandan28.asm.qmsg
.........\..\jiandan28.cbx.xml
.........\..\jiandan28.cmp.rdb
.........\..\jiandan28.db_info
.........\..\jiandan28.dbp
.........\..\jiandan28.eco.cdb
.........\..\jiandan28.eds_overflow
.........\..\jiandan28.fit.qmsg
.........\..\jiandan28.fnsim.hdb
.........\..\jiandan28.fnsim.qmsg
.........\..\jiandan28.hier_info
.........\..\jiandan28.hif
.........\..\jiandan28.map.cdb
.........\..\jiandan28.map.hdb
.........\..\jiandan28.map.logdb
.........\..\jiandan28.map.qmsg
.........\..\jiandan28.pre_map.cdb
.........\..\jiandan28.pre_map.hdb
.........\..\jiandan28.psp
.........\..\jiandan28.pss
.........\..\jiandan28.rtlv.hdb
.........\..\jiandan28.rtlv_sg.cdb
.........\..\jiandan28.rtlv_sg_swap.cdb
.........\..\jiandan28.sgdiff.cdb
.........\..\jiandan28.sgdiff.hdb
.........\..\jiandan28.sim.hdb
.........\..\jiandan28.sim.qmsg
.........\..\jiandan28.sim.rdb
.........\..\jiandan28.sim_ori.vwf
.........\..\jiandan28.simfam
.........\..\jiandan28.sld_design_entry.sci
.........\..\jiandan28.sld_design_entry_dsc.sci
.........\..\jiandan28.syn_hier_info
.........\..\jiandan28.tan.qmsg
.........\..\jiandan28.tis_db_list.ddb
.........\..\mux_1ac.tdf
.........\..\mux_9bc.tdf
.........\..\mux_ebc.tdf
.........\..\mux_hbc.tdf
.........\..\mux_s9c.tdf
.........\..\mux_ucc.tdf
.........\..\prev_cmp_jiandan28.asm.qmsg
.........\..\prev_cmp_jiandan28.fit.qmsg
.........\..\prev_cmp_jiandan28.map.qmsg
.........\..\prev_cmp_jiandan28.qmsg
.........\..\prev_cmp_jiandan28.sim.qmsg
.........\..\prev_cmp_jiandan28.tan.qmsg
.........\..\wed.wsf
.........\dispa.bsf
.........\dispa.vhd
.........\dispa.vhd.bak
.........\fen_clk.bsf
.........\fen_clk.vhd
.........\fen_clk.vhd.bak
.........\jiandan28.asm.rpt
.........\jiandan28.bdf
.........\jiandan28.done
.........\jiandan28.fit.rpt
.........\jiandan28.fit.summary
.........\jiandan28.flow.rpt
.........\jiandan28.map.rpt
.........\jiandan28.map.summary
.........\jiandan28.pin
.........\jiandan28.pof
.........\jiandan28.qpf
.........\jiandan28.qsf
.........\jiandan28.qws
.........\jiandan28.sim.rpt
.........\jiandan28.sof
.........\jiandan28.tan.rpt
.........\jiandan28.tan.summary
.........\jiandan28.vwf
.........\lock.bsf
.........\lock.vhd
.........\lock.vhd.bak
.........\scan.bsf
.........\scan.vhd
.........\scan.vhd.bak
.........\testclk.bsf
.........\testclk.vhd
.........\testclk.vhd.bak
.........\count10.bsf
.........\count10.vhd
.........\count10.vhd.bak
.........\db
.........\..\add_sub_0nh.tdf
.........\..\add_sub_1nh.tdf
.........\..\add_sub_ioh.tdf
.........\..\add_sub_jlh.tdf
.........\..\add_sub_klh.tdf
.........\..\add_sub_vmh.tdf
.........\..\jiandan28.asm.qmsg
.........\..\jiandan28.cbx.xml
.........\..\jiandan28.cmp.rdb
.........\..\jiandan28.db_info
.........\..\jiandan28.dbp
.........\..\jiandan28.eco.cdb
.........\..\jiandan28.eds_overflow
.........\..\jiandan28.fit.qmsg
.........\..\jiandan28.fnsim.hdb
.........\..\jiandan28.fnsim.qmsg
.........\..\jiandan28.hier_info
.........\..\jiandan28.hif
.........\..\jiandan28.map.cdb
.........\..\jiandan28.map.hdb
.........\..\jiandan28.map.logdb
.........\..\jiandan28.map.qmsg
.........\..\jiandan28.pre_map.cdb
.........\..\jiandan28.pre_map.hdb
.........\..\jiandan28.psp
.........\..\jiandan28.pss
.........\..\jiandan28.rtlv.hdb
.........\..\jiandan28.rtlv_sg.cdb
.........\..\jiandan28.rtlv_sg_swap.cdb
.........\..\jiandan28.sgdiff.cdb
.........\..\jiandan28.sgdiff.hdb
.........\..\jiandan28.sim.hdb
.........\..\jiandan28.sim.qmsg
.........\..\jiandan28.sim.rdb
.........\..\jiandan28.sim_ori.vwf
.........\..\jiandan28.simfam
.........\..\jiandan28.sld_design_entry.sci
.........\..\jiandan28.sld_design_entry_dsc.sci
.........\..\jiandan28.syn_hier_info
.........\..\jiandan28.tan.qmsg
.........\..\jiandan28.tis_db_list.ddb
.........\..\mux_1ac.tdf
.........\..\mux_9bc.tdf
.........\..\mux_ebc.tdf
.........\..\mux_hbc.tdf
.........\..\mux_s9c.tdf
.........\..\mux_ucc.tdf
.........\..\prev_cmp_jiandan28.asm.qmsg
.........\..\prev_cmp_jiandan28.fit.qmsg
.........\..\prev_cmp_jiandan28.map.qmsg
.........\..\prev_cmp_jiandan28.qmsg
.........\..\prev_cmp_jiandan28.sim.qmsg
.........\..\prev_cmp_jiandan28.tan.qmsg
.........\..\wed.wsf
.........\dispa.bsf
.........\dispa.vhd
.........\dispa.vhd.bak
.........\fen_clk.bsf
.........\fen_clk.vhd
.........\fen_clk.vhd.bak
.........\jiandan28.asm.rpt
.........\jiandan28.bdf
.........\jiandan28.done
.........\jiandan28.fit.rpt
.........\jiandan28.fit.summary
.........\jiandan28.flow.rpt
.........\jiandan28.map.rpt
.........\jiandan28.map.summary
.........\jiandan28.pin
.........\jiandan28.pof
.........\jiandan28.qpf
.........\jiandan28.qsf
.........\jiandan28.qws
.........\jiandan28.sim.rpt
.........\jiandan28.sof
.........\jiandan28.tan.rpt
.........\jiandan28.tan.summary
.........\jiandan28.vwf
.........\lock.bsf
.........\lock.vhd
.........\lock.vhd.bak
.........\scan.bsf
.........\scan.vhd
.........\scan.vhd.bak
.........\testclk.bsf
.........\testclk.vhd
.........\testclk.vhd.bak