文件名称:DE2_70_TV_PIP
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介绍说明－－下载内容均来自于网络，请自行研究使用
DE2的代码，主要涉及画中画的处理，用了独特的处理方式，值得借鉴。-The DE2 code, mainly related to the processing of the picture in picture, with a unique approach, it is worth learning from.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
DE2_70_TV_PIP\AUDIO_DAC.v
.............\command.v
.............\composite_to_vga.ocp
.............\composite_to_vga.v
.............\control_interface.v
.............\db\DE2_70_TV_PIP.db_info
.............\..\DE2_70_TV_PIP.eco.cdb
.............\..\DE2_70_TV_PIP.sld_design_entry.sci
.............\..\logic_util_heursitic.dat
.............\DE2P_TOP.v
.............\DE2_70_TV_PIP.flow.rpt
.............\DE2_70_TV_PIP.map.rpt
.............\DE2_70_TV_PIP.map.summary
.............\DE2_70_TV_PIP.pin
.............\DE2_70_TV_PIP.pof
.............\DE2_70_TV_PIP.qpf
.............\DE2_70_TV_PIP.qsf
.............\DE2_70_TV_PIP.qws
.............\DE2_70_TV_PIP.sof
.............\DE2_70_TV_PIP.v
.............\DE2_70_TV_PIP_assignment_defaults.qdf
.............\DE2_70_TV_PIP_time_limited.sof
.............\decode_656.v
.............\DIV.v
.............\I2C_AV_Config.v
.............\I2C_Controller.v
.............\incremental_db\README
.............\ITU_656_Decoder.v
.............\LCD_Controller.v
.............\LCD_TEST.v
.............\Line_Buffer.v
.............\old_SEG7_LUT.v
.............\old_SEG7_LUT_8.v
.............\PipPositionAdj.v
.............\PLL.v
.............\pll27.v
.............\PLL50.v
.............\README.txt
.............\Reset_Delay.v
.............\Sdram_Control_4Port.v
.............\Sdram_Params.h
.............\Sdram_PLL.v
.............\Sdram_RD_FIFO.v
.............\Sdram_WR_FIFO.v
.............\sdr_data_path.v
.............\tb_lowpass.vhd
.............\TD_Detect.ocp
.............\TD_Detect.v
.............\TP_RAM.v
.............\VGA_Ctrl2.v
.............\YCbCr2RGB.v
.............\YUV422_to_444.v
.............\incremental_db\compiled_partitions
.............\db
.............\incremental_db
DE2_70_TV_PIP
.............\command.v
.............\composite_to_vga.ocp
.............\composite_to_vga.v
.............\control_interface.v
.............\db\DE2_70_TV_PIP.db_info
.............\..\DE2_70_TV_PIP.eco.cdb
.............\..\DE2_70_TV_PIP.sld_design_entry.sci
.............\..\logic_util_heursitic.dat
.............\DE2P_TOP.v
.............\DE2_70_TV_PIP.flow.rpt
.............\DE2_70_TV_PIP.map.rpt
.............\DE2_70_TV_PIP.map.summary
.............\DE2_70_TV_PIP.pin
.............\DE2_70_TV_PIP.pof
.............\DE2_70_TV_PIP.qpf
.............\DE2_70_TV_PIP.qsf
.............\DE2_70_TV_PIP.qws
.............\DE2_70_TV_PIP.sof
.............\DE2_70_TV_PIP.v
.............\DE2_70_TV_PIP_assignment_defaults.qdf
.............\DE2_70_TV_PIP_time_limited.sof
.............\decode_656.v
.............\DIV.v
.............\I2C_AV_Config.v
.............\I2C_Controller.v
.............\incremental_db\README
.............\ITU_656_Decoder.v
.............\LCD_Controller.v
.............\LCD_TEST.v
.............\Line_Buffer.v
.............\old_SEG7_LUT.v
.............\old_SEG7_LUT_8.v
.............\PipPositionAdj.v
.............\PLL.v
.............\pll27.v
.............\PLL50.v
.............\README.txt
.............\Reset_Delay.v
.............\Sdram_Control_4Port.v
.............\Sdram_Params.h
.............\Sdram_PLL.v
.............\Sdram_RD_FIFO.v
.............\Sdram_WR_FIFO.v
.............\sdr_data_path.v
.............\tb_lowpass.vhd
.............\TD_Detect.ocp
.............\TD_Detect.v
.............\TP_RAM.v
.............\VGA_Ctrl2.v
.............\YCbCr2RGB.v
.............\YUV422_to_444.v
.............\incremental_db\compiled_partitions
.............\db
.............\incremental_db
DE2_70_TV_PIP