文件名称:the-design-of-string-out-of-register
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利用FPGA编程-------实现“并入串出寄存器设计”-Use of FPGA programming-------incorporated into the design of string out of register
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下载文件列表
实验5 并入串出寄存器设计\add4.asm.rpt
........................\add4.done
........................\add4.fit.rpt
........................\add4.fit.smsg
........................\add4.fit.summary
........................\add4.flow.rpt
........................\add4.map.rpt
........................\add4.map.summary
........................\add4.pin
........................\add4.pof
........................\add4.qpf
........................\add4.qsf
........................\add4.qws
........................\add4.sim.rpt
........................\add4.sof
........................\add4.tan.rpt
........................\add4.tan.summary
........................\add4.vhd
........................\add4.vhd.bak
........................\add4.vwf
........................\db\add4.asm.qmsg
........................\..\add4.asm_labs.ddb
........................\..\add4.cbx.xml
........................\..\add4.cmp.bpm
........................\..\add4.cmp.cdb
........................\..\add4.cmp.ecobp
........................\..\add4.cmp.hdb
........................\..\add4.cmp.logdb
........................\..\add4.cmp.rdb
........................\..\add4.cmp.tdb
........................\..\add4.cmp0.ddb
........................\..\add4.cmp_bb.cdb
........................\..\add4.cmp_bb.hdb
........................\..\add4.cmp_bb.logdb
........................\..\add4.cmp_bb.rcf
........................\..\add4.dbp
........................\..\add4.db_info
........................\..\add4.eco.cdb
........................\..\add4.eds_overflow
........................\..\add4.fit.qmsg
........................\..\add4.fnsim.cdb
........................\..\add4.fnsim.hdb
........................\..\add4.fnsim.qmsg
........................\..\add4.hier_info
........................\..\add4.hif
........................\..\add4.map.bpm
........................\..\add4.map.cdb
........................\..\add4.map.ecobp
........................\..\add4.map.hdb
........................\..\add4.map.logdb
........................\..\add4.map.qmsg
........................\..\add4.map_bb.cdb
........................\..\add4.map_bb.hdb
........................\..\add4.map_bb.logdb
........................\..\add4.pre_map.cdb
........................\..\add4.pre_map.hdb
........................\..\add4.psp
........................\..\add4.pss
........................\..\add4.rtlv.hdb
........................\..\add4.rtlv_sg.cdb
........................\..\add4.rtlv_sg_swap.cdb
........................\..\add4.sgdiff.cdb
........................\..\add4.sgdiff.hdb
........................\..\add4.signalprobe.cdb
........................\..\add4.sim.cvwf
........................\..\add4.sim.hdb
........................\..\add4.sim.qmsg
........................\..\add4.sim.rdb
........................\..\add4.simfam
........................\..\add4.sld_design_entry.sci
........................\..\add4.sld_design_entry_dsc.sci
........................\..\add4.syn_hier_info
........................\..\add4.tan.qmsg
........................\..\add4.tis_db_list.ddb
........................\..\mux_lpc.tdf
........................\..\prev_cmp_add4.map.qmsg
........................\..\prev_cmp_add4.qmsg
........................\..\prev_cmp_add4.sim.qmsg
........................\..\wed.wsf
........................\db
实验5 并入串出寄存器设计
........................\add4.done
........................\add4.fit.rpt
........................\add4.fit.smsg
........................\add4.fit.summary
........................\add4.flow.rpt
........................\add4.map.rpt
........................\add4.map.summary
........................\add4.pin
........................\add4.pof
........................\add4.qpf
........................\add4.qsf
........................\add4.qws
........................\add4.sim.rpt
........................\add4.sof
........................\add4.tan.rpt
........................\add4.tan.summary
........................\add4.vhd
........................\add4.vhd.bak
........................\add4.vwf
........................\db\add4.asm.qmsg
........................\..\add4.asm_labs.ddb
........................\..\add4.cbx.xml
........................\..\add4.cmp.bpm
........................\..\add4.cmp.cdb
........................\..\add4.cmp.ecobp
........................\..\add4.cmp.hdb
........................\..\add4.cmp.logdb
........................\..\add4.cmp.rdb
........................\..\add4.cmp.tdb
........................\..\add4.cmp0.ddb
........................\..\add4.cmp_bb.cdb
........................\..\add4.cmp_bb.hdb
........................\..\add4.cmp_bb.logdb
........................\..\add4.cmp_bb.rcf
........................\..\add4.dbp
........................\..\add4.db_info
........................\..\add4.eco.cdb
........................\..\add4.eds_overflow
........................\..\add4.fit.qmsg
........................\..\add4.fnsim.cdb
........................\..\add4.fnsim.hdb
........................\..\add4.fnsim.qmsg
........................\..\add4.hier_info
........................\..\add4.hif
........................\..\add4.map.bpm
........................\..\add4.map.cdb
........................\..\add4.map.ecobp
........................\..\add4.map.hdb
........................\..\add4.map.logdb
........................\..\add4.map.qmsg
........................\..\add4.map_bb.cdb
........................\..\add4.map_bb.hdb
........................\..\add4.map_bb.logdb
........................\..\add4.pre_map.cdb
........................\..\add4.pre_map.hdb
........................\..\add4.psp
........................\..\add4.pss
........................\..\add4.rtlv.hdb
........................\..\add4.rtlv_sg.cdb
........................\..\add4.rtlv_sg_swap.cdb
........................\..\add4.sgdiff.cdb
........................\..\add4.sgdiff.hdb
........................\..\add4.signalprobe.cdb
........................\..\add4.sim.cvwf
........................\..\add4.sim.hdb
........................\..\add4.sim.qmsg
........................\..\add4.sim.rdb
........................\..\add4.simfam
........................\..\add4.sld_design_entry.sci
........................\..\add4.sld_design_entry_dsc.sci
........................\..\add4.syn_hier_info
........................\..\add4.tan.qmsg
........................\..\add4.tis_db_list.ddb
........................\..\mux_lpc.tdf
........................\..\prev_cmp_add4.map.qmsg
........................\..\prev_cmp_add4.qmsg
........................\..\prev_cmp_add4.sim.qmsg
........................\..\wed.wsf
........................\db
实验5 并入串出寄存器设计