文件名称:Test_POC
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东南大学VHDL课程POC设计 Verilog语言-Southeast University VHDL course POC designed the by Verilog language
(系统自动生成,下载前可以参看下载内容)
下载文件列表
TEST.qws
TEST.asm.rpt
TEST.fit.rpt
TEST.flow.rpt
TEST.map.rpt
TEST.sim.rpt
TEST.tan.rpt
TEST.fit.smsg
TEST.map.smsg
TEST.sof
TEST.fit.summary
TEST.map.summary
TEST.tan.summary
db\prev_cmp_TEST.asm.qmsg
..\prev_cmp_TEST.fit.qmsg
..\prev_cmp_TEST.map.qmsg
..\prev_cmp_TEST.sim.qmsg
..\prev_cmp_TEST.tan.qmsg
..\TEST.asm.qmsg
..\TEST.asm_labs.ddb
..\TEST.cbx.xml
..\TEST.cmp.bpm
..\TEST.cmp.cdb
..\TEST.cmp.ecobp
..\TEST.cmp.hdb
..\TEST.cmp.logdb
..\TEST.cmp.rdb
..\TEST.cmp.tdb
..\TEST.cmp0.ddb
..\TEST.cmp_bb.cdb
..\TEST.cmp_bb.hdb
..\TEST.cmp_bb.logdb
..\TEST.cmp_bb.rcf
..\TEST.dbp
..\TEST.db_info
..\TEST.eco.cdb
..\TEST.eds_overflow
..\TEST.fit.qmsg
..\TEST.fnsim.cdb
..\TEST.fnsim.hdb
..\TEST.fnsim.qmsg
..\TEST.hier_info
..\TEST.hif
..\TEST.map.bpm
..\TEST.map.cdb
..\TEST.map.ecobp
..\TEST.map.hdb
..\TEST.map.logdb
..\TEST.map.qmsg
..\TEST.map_bb.cdb
..\TEST.map_bb.hdb
..\TEST.map_bb.logdb
..\TEST.pre_map.cdb
..\TEST.pre_map.hdb
..\TEST.psp
..\TEST.pss
..\TEST.rtlv.hdb
..\TEST.rtlv_sg.cdb
..\TEST.rtlv_sg_swap.cdb
..\TEST.sgdiff.cdb
..\TEST.sgdiff.hdb
..\TEST.signalprobe.cdb
..\TEST.sim.cvwf
..\TEST.sim.hdb
..\TEST.sim.qmsg
..\TEST.sim.rdb
..\TEST.sld_design_entry.sci
..\TEST.sld_design_entry_dsc.sci
..\TEST.smp_dump.txt
..\TEST.syn_hier_info
..\TEST.tan.qmsg
..\wed.wsf
POC.v.bak
Print.v.bak
SCPU.v.bak
TEST.done
POC.v
Print.v
SCPU.v
TEST.pin
TEST.pof
prev_cmp_TEST.qmsg
TEST.qsf
POC.bsf
Print.bsf
SCPU.bsf
TEST.bdf
TEST.qpf
TEST.vwf
db
TEST.asm.rpt
TEST.fit.rpt
TEST.flow.rpt
TEST.map.rpt
TEST.sim.rpt
TEST.tan.rpt
TEST.fit.smsg
TEST.map.smsg
TEST.sof
TEST.fit.summary
TEST.map.summary
TEST.tan.summary
db\prev_cmp_TEST.asm.qmsg
..\prev_cmp_TEST.fit.qmsg
..\prev_cmp_TEST.map.qmsg
..\prev_cmp_TEST.sim.qmsg
..\prev_cmp_TEST.tan.qmsg
..\TEST.asm.qmsg
..\TEST.asm_labs.ddb
..\TEST.cbx.xml
..\TEST.cmp.bpm
..\TEST.cmp.cdb
..\TEST.cmp.ecobp
..\TEST.cmp.hdb
..\TEST.cmp.logdb
..\TEST.cmp.rdb
..\TEST.cmp.tdb
..\TEST.cmp0.ddb
..\TEST.cmp_bb.cdb
..\TEST.cmp_bb.hdb
..\TEST.cmp_bb.logdb
..\TEST.cmp_bb.rcf
..\TEST.dbp
..\TEST.db_info
..\TEST.eco.cdb
..\TEST.eds_overflow
..\TEST.fit.qmsg
..\TEST.fnsim.cdb
..\TEST.fnsim.hdb
..\TEST.fnsim.qmsg
..\TEST.hier_info
..\TEST.hif
..\TEST.map.bpm
..\TEST.map.cdb
..\TEST.map.ecobp
..\TEST.map.hdb
..\TEST.map.logdb
..\TEST.map.qmsg
..\TEST.map_bb.cdb
..\TEST.map_bb.hdb
..\TEST.map_bb.logdb
..\TEST.pre_map.cdb
..\TEST.pre_map.hdb
..\TEST.psp
..\TEST.pss
..\TEST.rtlv.hdb
..\TEST.rtlv_sg.cdb
..\TEST.rtlv_sg_swap.cdb
..\TEST.sgdiff.cdb
..\TEST.sgdiff.hdb
..\TEST.signalprobe.cdb
..\TEST.sim.cvwf
..\TEST.sim.hdb
..\TEST.sim.qmsg
..\TEST.sim.rdb
..\TEST.sld_design_entry.sci
..\TEST.sld_design_entry_dsc.sci
..\TEST.smp_dump.txt
..\TEST.syn_hier_info
..\TEST.tan.qmsg
..\wed.wsf
POC.v.bak
Print.v.bak
SCPU.v.bak
TEST.done
POC.v
Print.v
SCPU.v
TEST.pin
TEST.pof
prev_cmp_TEST.qmsg
TEST.qsf
POC.bsf
Print.bsf
SCPU.bsf
TEST.bdf
TEST.qpf
TEST.vwf
db