文件名称:eetop.cn_PipelineADC
- 所属分类:
- 软件工程
- 资源属性:
- [PDF]
- 上传时间:
- 2012-11-26
- 文件大小:
- 2.33mb
- 下载次数:
- 0次
- 提 供 者:
- Yu-Jian*******
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
ADC_Spec_Article_FINAL_TC,需要的人可以參考看看!-ADC_Spec_Article_FINAL_TC, can refer to those who need to see!
(系统自动生成,下载前可以参看下载内容)
下载文件列表
PipelineADC\Performance Summary.pdf
...........\Slide\slides2.pdf
...........\.....\Thumbs.db
...........\.....\WCR_nyq_adc.ppt
...........\Slide
...........\.chematic\adc.pdf
...........\.........\adc15.pdf
...........\.........\adcchip.pdf
...........\.........\adder.pdf
...........\.........\amp2st1.pdf
...........\.........\amp2st2.pdf
...........\.........\amp2stx.pdf
...........\.........\bias.pdf
...........\.........\clkdrv.pdf
...........\.........\clkdrvbig.pdf
...........\.........\clkgen.pdf
...........\.........\clkinput.pdf
...........\.........\comp1.pdf
...........\.........\core2st1.pdf
...........\.........\core2st2.pdf
...........\.........\core2stx.pdf
...........\.........\dac15_1.pdf
...........\.........\dac15_2.pdf
...........\.........\dac15_x.pdf
...........\.........\ddelay.pdf
...........\.........\hierarchy.pdf
...........\.........\hierarchy.txt
...........\.........\invtrs.pdf
...........\.........\inv_064.pdf
...........\.........\inv_slow.pdf
...........\.........\nand.pdf
...........\.........\nand3i.pdf
...........\.........\nor3_064.pdf
...........\.........\nor_064.pdf
...........\.........\pindrv.pdf
...........\.........\sh1.pdf
...........\.........\sh2.pdf
...........\.........\shx.pdf
...........\.........\stage1.pdf
...........\.........\stage2.pdf
...........\.........\stage9.pdf
...........\.........\stagex.pdf
...........\.........\tgate1.pdf
...........\.........\tgate2.pdf
...........\.........\tgatemin.pdf
...........\.........\tgatex.pdf
...........\.........\xor.pdf
...........\.........\xor3i.pdf
...........\Schematic
...........\Layout Tour\adcchip.png
...........\...........\layout_hierarchy.pdf
...........\...........\Thumbs.db
...........\...........\Photograps\ADC1.jpg
...........\...........\..........\ADC2.jpg
...........\...........\..........\Thumbs.db
...........\...........\Photograps
...........\...........\.erformance Tests\DNL.png
...........\...........\.................\Experimental Setup.gif
...........\...........\.................\INL.png
...........\...........\.................\Intermodulation (100KHz).gif
...........\...........\.................\Intermodulation(10 MHz).png
...........\...........\.................\Single Tone (20 KHz ).gif
...........\...........\.................\SNR and SNDR (3.578 MHz).png
...........\...........\.................\Thumbs.db
...........\...........\Performance Tests
...........\...........\Generic Pipeline Stage\amp2st1.png
...........\...........\......................\dac15_1.png
...........\...........\......................\stagex.png
...........\...........\......................\Thumbs.db
...........\...........\......................\Flash ADC\adc15.png
...........\...........\......................\.........\comp1.png
...........\...........\......................\.........\Thumbs.db
...........\...........\......................\Flash ADC
...........\...........\Generic Pipeline Stage
...........\...........\Digital Corner\bias.png
...........\...........\..............\clk.png
...........\...........\..............\digital_corner.png
...........\...........\..............\pad.png
...........\...........\..............\pindrv.png
...........\...........\..............\res_and_cap.png
...........\...........\..............\routing.png
...........\...........\..............\Thumbs.db
...........\...........\..............\Digital Delay and Correction Logic\adder.png
...........\...........\..............\..................................\ddelay.png
...........\...........\..............\..................................\shift_reg.png
...........\...........\..............\..................................\Thumbs.db
...........\...........\..............\Digital Delay and Correction Logic
...........\...........\Digital Corner
...........\...........\Clock Generation
...........\Layout Tour
PipelineADC
...........\Slide\slides2.pdf
...........\.....\Thumbs.db
...........\.....\WCR_nyq_adc.ppt
...........\Slide
...........\.chematic\adc.pdf
...........\.........\adc15.pdf
...........\.........\adcchip.pdf
...........\.........\adder.pdf
...........\.........\amp2st1.pdf
...........\.........\amp2st2.pdf
...........\.........\amp2stx.pdf
...........\.........\bias.pdf
...........\.........\clkdrv.pdf
...........\.........\clkdrvbig.pdf
...........\.........\clkgen.pdf
...........\.........\clkinput.pdf
...........\.........\comp1.pdf
...........\.........\core2st1.pdf
...........\.........\core2st2.pdf
...........\.........\core2stx.pdf
...........\.........\dac15_1.pdf
...........\.........\dac15_2.pdf
...........\.........\dac15_x.pdf
...........\.........\ddelay.pdf
...........\.........\hierarchy.pdf
...........\.........\hierarchy.txt
...........\.........\invtrs.pdf
...........\.........\inv_064.pdf
...........\.........\inv_slow.pdf
...........\.........\nand.pdf
...........\.........\nand3i.pdf
...........\.........\nor3_064.pdf
...........\.........\nor_064.pdf
...........\.........\pindrv.pdf
...........\.........\sh1.pdf
...........\.........\sh2.pdf
...........\.........\shx.pdf
...........\.........\stage1.pdf
...........\.........\stage2.pdf
...........\.........\stage9.pdf
...........\.........\stagex.pdf
...........\.........\tgate1.pdf
...........\.........\tgate2.pdf
...........\.........\tgatemin.pdf
...........\.........\tgatex.pdf
...........\.........\xor.pdf
...........\.........\xor3i.pdf
...........\Schematic
...........\Layout Tour\adcchip.png
...........\...........\layout_hierarchy.pdf
...........\...........\Thumbs.db
...........\...........\Photograps\ADC1.jpg
...........\...........\..........\ADC2.jpg
...........\...........\..........\Thumbs.db
...........\...........\Photograps
...........\...........\.erformance Tests\DNL.png
...........\...........\.................\Experimental Setup.gif
...........\...........\.................\INL.png
...........\...........\.................\Intermodulation (100KHz).gif
...........\...........\.................\Intermodulation(10 MHz).png
...........\...........\.................\Single Tone (20 KHz ).gif
...........\...........\.................\SNR and SNDR (3.578 MHz).png
...........\...........\.................\Thumbs.db
...........\...........\Performance Tests
...........\...........\Generic Pipeline Stage\amp2st1.png
...........\...........\......................\dac15_1.png
...........\...........\......................\stagex.png
...........\...........\......................\Thumbs.db
...........\...........\......................\Flash ADC\adc15.png
...........\...........\......................\.........\comp1.png
...........\...........\......................\.........\Thumbs.db
...........\...........\......................\Flash ADC
...........\...........\Generic Pipeline Stage
...........\...........\Digital Corner\bias.png
...........\...........\..............\clk.png
...........\...........\..............\digital_corner.png
...........\...........\..............\pad.png
...........\...........\..............\pindrv.png
...........\...........\..............\res_and_cap.png
...........\...........\..............\routing.png
...........\...........\..............\Thumbs.db
...........\...........\..............\Digital Delay and Correction Logic\adder.png
...........\...........\..............\..................................\ddelay.png
...........\...........\..............\..................................\shift_reg.png
...........\...........\..............\..................................\Thumbs.db
...........\...........\..............\Digital Delay and Correction Logic
...........\...........\Digital Corner
...........\...........\Clock Generation
...........\Layout Tour
PipelineADC